From: Stefan Roese <sr@denx.de>
Date: Wed, 5 Aug 2020 13:07:30 +0000 (+0200)
Subject: spi: octeon_spi: Use a fixed 100MHz input clock on Octeon TX2
X-Git-Tag: v2021.10~480^2~4
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=8a35094faa6a545a5abec5ef1708dea4b3b03b26;p=platform%2Fkernel%2Fu-boot.git

spi: octeon_spi: Use a fixed 100MHz input clock on Octeon TX2

Octeon TX2 sets the TB100_EN bit in the config register. We need to use
a fixed 100MHz clock for this as well to work properly.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
---

diff --git a/drivers/spi/octeon_spi.c b/drivers/spi/octeon_spi.c
index 83fe633..7e88e55 100644
--- a/drivers/spi/octeon_spi.c
+++ b/drivers/spi/octeon_spi.c
@@ -519,7 +519,10 @@ static int octeon_spi_set_speed(struct udevice *bus, uint max_hz)
 	if (max_hz > OCTEON_SPI_MAX_CLOCK_HZ)
 		max_hz = OCTEON_SPI_MAX_CLOCK_HZ;
 
-	clk_rate = clk_get_rate(&priv->clk);
+	if (device_is_compatible(bus, "cavium,thunderx-spi"))
+		clk_rate = 100000000;
+	else
+		clk_rate = clk_get_rate(&priv->clk);
 	if (IS_ERR_VALUE(clk_rate))
 		return -EINVAL;