From: Boris Brezillon Date: Tue, 26 Jan 2021 16:05:22 +0000 (+0100) Subject: panfrost: Use dev->arch where appropriate X-Git-Tag: upstream/21.2.3~8547 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=89cfa4180ba6ffe4e89ce2110da8c1a6b2ebf6fa;p=platform%2Fupstream%2Fmesa.git panfrost: Use dev->arch where appropriate The architecture has already been extracted in panfrost_open_device() don't do it again. Signed-off-by: Boris Brezillon Reviewed-by: Alyssa Rosenzweig Part-of: --- diff --git a/src/gallium/drivers/panfrost/pan_blend_cso.c b/src/gallium/drivers/panfrost/pan_blend_cso.c index d55eef0..553df21 100644 --- a/src/gallium/drivers/panfrost/pan_blend_cso.c +++ b/src/gallium/drivers/panfrost/pan_blend_cso.c @@ -118,7 +118,6 @@ panfrost_create_blend_state(struct pipe_context *pipe, struct panfrost_device *dev = pan_device(pipe->screen); struct panfrost_context *ctx = pan_context(pipe); struct panfrost_blend_state *so = rzalloc(ctx, struct panfrost_blend_state); - unsigned version = dev->gpu_id >> 12; so->base = *blend; /* TODO: The following features are not yet implemented */ @@ -141,7 +140,7 @@ panfrost_create_blend_state(struct pipe_context *pipe, panfrost_make_fixed_blend_mode(pipe, &rt->equation); /* v6 doesn't support blend constants in FF blend equations. */ - if (rt->has_fixed_function && version == 6 && rt->constant_mask) + if (rt->has_fixed_function && dev->arch == 6 && rt->constant_mask) rt->has_fixed_function = false; if (rt->has_fixed_function) { diff --git a/src/gallium/drivers/panfrost/pan_mfbd.c b/src/gallium/drivers/panfrost/pan_mfbd.c index c7afb84..8928a48 100644 --- a/src/gallium/drivers/panfrost/pan_mfbd.c +++ b/src/gallium/drivers/panfrost/pan_mfbd.c @@ -136,7 +136,6 @@ panfrost_mfbd_rt_set_buf(struct pipe_surface *surf, struct MALI_RENDER_TARGET *rt) { struct panfrost_device *dev = pan_device(surf->context->screen); - unsigned version = dev->gpu_id >> 12; struct panfrost_resource *rsrc = pan_resource(surf->texture); unsigned level = surf->u.tex.level; unsigned first_layer = surf->u.tex.first_layer; @@ -160,7 +159,7 @@ panfrost_mfbd_rt_set_buf(struct pipe_surface *surf, if (rsrc->layout.modifier == DRM_FORMAT_MOD_LINEAR) { mali_ptr base = panfrost_get_texture_address(rsrc, level, first_layer, 0); - if (version >= 7) + if (dev->arch >= 7) rt->bifrost_v7.writeback_block_format = MALI_BLOCK_FORMAT_V7_LINEAR; else rt->midgard.writeback_block_format = MALI_BLOCK_FORMAT_LINEAR; @@ -171,7 +170,7 @@ panfrost_mfbd_rt_set_buf(struct pipe_surface *surf, } else if (rsrc->layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED) { mali_ptr base = panfrost_get_texture_address(rsrc, level, first_layer, 0); - if (version >= 7) + if (dev->arch >= 7) rt->bifrost_v7.writeback_block_format = MALI_BLOCK_FORMAT_V7_TILED_U_INTERLEAVED; else rt->midgard.writeback_block_format = MALI_BLOCK_FORMAT_TILED_U_INTERLEAVED; @@ -182,7 +181,7 @@ panfrost_mfbd_rt_set_buf(struct pipe_surface *surf, } else if (drm_is_afbc(rsrc->layout.modifier)) { const struct panfrost_slice *slice = &rsrc->layout.slices[level]; - if (version >= 7) + if (dev->arch >= 7) rt->bifrost_v7.writeback_block_format = MALI_BLOCK_FORMAT_V7_AFBC; else rt->midgard.writeback_block_format = MALI_BLOCK_FORMAT_AFBC; @@ -215,7 +214,6 @@ panfrost_mfbd_emit_rt(struct panfrost_batch *batch, unsigned rt_offset, unsigned rt_idx) { struct panfrost_device *dev = pan_device(batch->ctx->base.screen); - unsigned version = dev->gpu_id >> 12; pan_pack(rtp, RENDER_TARGET, rt) { rt.clean_pixel_write_enable = true; @@ -227,7 +225,7 @@ panfrost_mfbd_emit_rt(struct panfrost_batch *batch, } else { rt.internal_format = MALI_COLOR_BUFFER_INTERNAL_FORMAT_R8G8B8A8; rt.internal_buffer_offset = rt_offset; - if (version >= 7) { + if (dev->arch >= 7) { rt.bifrost_v7.writeback_block_format = MALI_BLOCK_FORMAT_V7_TILED_U_INTERLEAVED; rt.dithering_enable = true; } @@ -260,7 +258,6 @@ panfrost_mfbd_zs_crc_ext_set_bufs(struct panfrost_batch *batch, struct panfrost_slice **checksum_slice) { struct panfrost_device *dev = pan_device(batch->ctx->base.screen); - unsigned version = dev->gpu_id >> 12; /* Checksumming only works with a single render target */ if (batch->key.nr_cbufs == 1) { @@ -279,7 +276,7 @@ panfrost_mfbd_zs_crc_ext_set_bufs(struct panfrost_batch *batch, else ext->crc_base = rsrc->bo->ptr.gpu + slice->crc.offset; - if ((batch->clear & PIPE_CLEAR_COLOR0) && version >= 7) { + if ((batch->clear & PIPE_CLEAR_COLOR0) && dev->arch >= 7) { ext->crc_clear_color = batch->clear_color[0][0] | 0xc000000000000000 | ((uint64_t)batch->clear_color[0][0] & 0xffff) << 32; @@ -301,7 +298,7 @@ panfrost_mfbd_zs_crc_ext_set_bufs(struct panfrost_batch *batch, unsigned first_layer = zs_surf->u.tex.first_layer; assert(zs_surf->u.tex.last_layer == first_layer); - if (version < 7) + if (dev->arch < 7) ext->zs_msaa = nr_samples > 1 ? MALI_MSAA_LAYERED : MALI_MSAA_SINGLE; else ext->zs_msaa_v7 = nr_samples > 1 ? MALI_MSAA_LAYERED : MALI_MSAA_SINGLE; @@ -313,7 +310,7 @@ panfrost_mfbd_zs_crc_ext_set_bufs(struct panfrost_batch *batch, &ext->zs_afbc_header, &ext->zs_afbc_body); - if (version >= 7) + if (dev->arch >= 7) ext->zs_block_format_v7 = MALI_BLOCK_FORMAT_V7_AFBC; else ext->zs_block_format = MALI_BLOCK_FORMAT_AFBC; @@ -342,12 +339,12 @@ panfrost_mfbd_zs_crc_ext_set_bufs(struct panfrost_batch *batch, rsrc->layout.slices[level].surface_stride : 0; if (rsrc->layout.modifier == DRM_FORMAT_MOD_LINEAR) { - if (version >= 7) + if (dev->arch >= 7) ext->zs_block_format_v7 = MALI_BLOCK_FORMAT_V7_LINEAR; else ext->zs_block_format = MALI_BLOCK_FORMAT_LINEAR; } else { - if (version >= 7) + if (dev->arch >= 7) ext->zs_block_format_v7 = MALI_BLOCK_FORMAT_V7_TILED_U_INTERLEAVED; else ext->zs_block_format = MALI_BLOCK_FORMAT_TILED_U_INTERLEAVED; @@ -374,7 +371,7 @@ panfrost_mfbd_zs_crc_ext_set_bufs(struct panfrost_batch *batch, */ ext->zs_write_format = MALI_ZS_FORMAT_D32; ext->s_write_format = MALI_S_FORMAT_S8; - if (version < 7) { + if (dev->arch < 7) { ext->s_block_format = ext->zs_block_format; ext->s_msaa = ext->zs_msaa; } else {