From: Konrad Dybcio Date: Wed, 13 Jan 2021 18:33:37 +0000 (+0100) Subject: drm/msm/a5xx: Fix VPC protect value in gpu_write() X-Git-Tag: accepted/tizen/unified/20230118.172025~7510^2~2^2~48 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=89c1ab960717fb0e9b61c8cf90316bd41309e90a;p=platform%2Fkernel%2Flinux-rpi.git drm/msm/a5xx: Fix VPC protect value in gpu_write() The upstream API for some reason uses logbase2 instead of just passing the argument as-is, whereas downstream CAF kernel does the latter. Hence, a mistake has been made when porting: 4 is the value that's supposed to be passed, but log2(4) = 2. Changing the value to 16 (= 2^4) fixes the issue. Signed-off-by: Konrad Dybcio Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Jordan Crouse Signed-off-by: Rob Clark --- diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index 66980f4..24ab51b 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -821,7 +821,7 @@ static int a5xx_hw_init(struct msm_gpu *gpu) /* VPC */ gpu_write(gpu, REG_A5XX_CP_PROTECT(14), ADRENO_PROTECT_RW(0xE68, 8)); - gpu_write(gpu, REG_A5XX_CP_PROTECT(15), ADRENO_PROTECT_RW(0xE70, 4)); + gpu_write(gpu, REG_A5XX_CP_PROTECT(15), ADRENO_PROTECT_RW(0xE70, 16)); /* UCHE */ gpu_write(gpu, REG_A5XX_CP_PROTECT(16), ADRENO_PROTECT_RW(0xE80, 16));