From: Jianxun Zhang <jianxun.zhang@intel.com>
Date: Mon, 10 Oct 2022 16:53:53 +0000 (-0700)
Subject: intel/isl: Add MTL RC CCS modifier into modifier info
X-Git-Tag: upstream/23.3.3~6893
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=898c7252c128f6a70b90851d8d1e2bc3956fa548;p=platform%2Fupstream%2Fmesa.git

intel/isl: Add MTL RC CCS modifier into modifier info

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20327>
---

diff --git a/src/intel/isl/isl_drm.c b/src/intel/isl/isl_drm.c
index 5a193fd..f0601dd 100644
--- a/src/intel/isl/isl_drm.c
+++ b/src/intel/isl/isl_drm.c
@@ -148,6 +148,13 @@ isl_drm_modifier_info_list[] = {
       .supports_clear_color = true,
    },
    {
+      .modifier = I915_FORMAT_MOD_4_TILED_MTL_RC_CCS,
+      .name = "I915_FORMAT_MOD_4_TILED_MTL_RC_CCS",
+      .tiling = ISL_TILING_4,
+      .aux_usage = ISL_AUX_USAGE_FCV_CCS_E,
+      .supports_clear_color = false,
+   },
+   {
       .modifier = DRM_FORMAT_MOD_INVALID,
    },
 };