From: Geert Uytterhoeven Date: Fri, 17 Dec 2021 12:49:32 +0000 (+0100) Subject: riscv: dts: sifive: fu540-c000: Fix PLIC node X-Git-Tag: v6.1-rc5~2177^2~10 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=893eae9ac7e4c23c70874c3981fdcf3311655874;p=platform%2Fkernel%2Flinux-starfive.git riscv: dts: sifive: fu540-c000: Fix PLIC node Fix the device node for the Platform-Level Interrupt Controller (PLIC): - Add missing "#address-cells" property, - Sort properties according to DT bindings. Signed-off-by: Geert Uytterhoeven Signed-off-by: Palmer Dabbelt --- diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi index b1250c1..3eef52b 100644 --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi @@ -140,10 +140,10 @@ compatible = "simple-bus"; ranges; plic0: interrupt-controller@c000000 { - #interrupt-cells = <1>; compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; reg = <0x0 0xc000000 0x0 0x4000000>; - riscv,ndev = <53>; + #address-cells = <0>; + #interrupt-cells = <1>; interrupt-controller; interrupts-extended = <&cpu0_intc 0xffffffff>, @@ -151,6 +151,7 @@ <&cpu2_intc 0xffffffff>, <&cpu2_intc 9>, <&cpu3_intc 0xffffffff>, <&cpu3_intc 9>, <&cpu4_intc 0xffffffff>, <&cpu4_intc 9>; + riscv,ndev = <53>; }; prci: clock-controller@10000000 { compatible = "sifive,fu540-c000-prci";