From: Pierre-Louis Bossart Date: Tue, 1 Sep 2020 15:05:51 +0000 (+0800) Subject: soundwire: bus: update multi-link definition with hw sync details X-Git-Tag: v5.10.7~1418^2~82^2~43 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=88d7c71ea5b29b322d9c72103a196234cb5040db;p=platform%2Fkernel%2Flinux-rpi.git soundwire: bus: update multi-link definition with hw sync details Hardware-based synchronization is typically required when the bus->multi_link flag is set. On Intel platforms, when the Cadence IP is configured in 'Multi Master Mode', the hardware synchronization is required even when a stream only uses a single segment. The existing code only deal with hardware synchronization when a stream uses more than one segment so to remain backwards compatible we add a configuration threshold. For Intel cases this threshold will be set to one, other platforms may be able to use the SSP-based sync in those cases. Signed-off-by: Pierre-Louis Bossart Signed-off-by: Bard Liao Link: https://lore.kernel.org/r/20200901150556.19432-6-yung-chuan.liao@linux.intel.com Signed-off-by: Vinod Koul --- diff --git a/include/linux/soundwire/sdw.h b/include/linux/soundwire/sdw.h index 63e7164..78f52cd 100644 --- a/include/linux/soundwire/sdw.h +++ b/include/linux/soundwire/sdw.h @@ -828,6 +828,11 @@ struct sdw_master_ops { * @multi_link: Store bus property that indicates if multi links * are supported. This flag is populated by drivers after reading * appropriate firmware (ACPI/DT). + * @hw_sync_min_links: Number of links used by a stream above which + * hardware-based synchronization is required. This value is only + * meaningful if multi_link is set. If set to 1, hardware-based + * synchronization will be used even if a stream only uses a single + * SoundWire segment. */ struct sdw_bus { struct device *dev; @@ -851,6 +856,7 @@ struct sdw_bus { unsigned int clk_stop_timeout; u32 bank_switch_timeout; bool multi_link; + int hw_sync_min_links; }; int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent,