From: Phil Sutter Date: Thu, 5 May 2011 13:29:04 +0000 (+0200) Subject: crypto: mv_cesa - move digest state initialisation to a better place X-Git-Tag: v3.0-rc1~371^2~8 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=8652348754a1f538daa1eab248e5c9c4c3600204;p=profile%2Fivi%2Fkernel-adaptation-intel-automotive.git crypto: mv_cesa - move digest state initialisation to a better place On one hand, the digest state registers need to be set only when actually using the crypto engine. On the other hand, there is a check for ctx->first_hash in mv_process_hash_current() already, so use that. Signed-off-by: Phil Sutter Signed-off-by: Herbert Xu --- diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c index c1925c2..a2d9e39 100644 --- a/drivers/crypto/mv_cesa.c +++ b/drivers/crypto/mv_cesa.c @@ -342,6 +342,12 @@ static void mv_process_hash_current(int first_block) op.config |= CFG_LAST_FRAG; else op.config |= CFG_MID_FRAG; + + writel(req_ctx->state[0], cpg->reg + DIGEST_INITIAL_VAL_A); + writel(req_ctx->state[1], cpg->reg + DIGEST_INITIAL_VAL_B); + writel(req_ctx->state[2], cpg->reg + DIGEST_INITIAL_VAL_C); + writel(req_ctx->state[3], cpg->reg + DIGEST_INITIAL_VAL_D); + writel(req_ctx->state[4], cpg->reg + DIGEST_INITIAL_VAL_E); } memcpy(cpg->sram + SRAM_CONFIG, &op, sizeof(struct sec_accel_config)); @@ -525,14 +531,6 @@ static void mv_start_new_hash_req(struct ahash_request *req) p->crypt_len = ctx->extra_bytes; } - if (unlikely(!ctx->first_hash)) { - writel(ctx->state[0], cpg->reg + DIGEST_INITIAL_VAL_A); - writel(ctx->state[1], cpg->reg + DIGEST_INITIAL_VAL_B); - writel(ctx->state[2], cpg->reg + DIGEST_INITIAL_VAL_C); - writel(ctx->state[3], cpg->reg + DIGEST_INITIAL_VAL_D); - writel(ctx->state[4], cpg->reg + DIGEST_INITIAL_VAL_E); - } - ctx->extra_bytes = hw_bytes % SHA1_BLOCK_SIZE; if (ctx->extra_bytes != 0 && (!ctx->last_chunk || ctx->count > MAX_HW_HASH_SIZE))