From: Sergei Shtylyov Date: Mon, 7 Dec 2009 19:36:15 +0000 (+0400) Subject: pata_hpt366: remove redundant code X-Git-Tag: v2.6.34-rc1~235^2~34 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=859faa875ed6760fcdfaf6f1fec1155a7e43dc21;p=platform%2Fupstream%2Fkernel-adaptation-pc.git pata_hpt366: remove redundant code There's no need to clear the fast interrupt bit in hpt366_set_mode() since we're doing it in hpt366_init_chipset() already. While at it, rename 'addr1' local variable to 'addr' and exclude 'ap->port_no' from its calculation as HPT36x are single-channel-per-function chips. Signed-off-by: Sergei Shtylyov Signed-off-by: Jeff Garzik --- diff --git a/drivers/ata/pata_hpt366.c b/drivers/ata/pata_hpt366.c index 0bd48e8..f6b2858 100644 --- a/drivers/ata/pata_hpt366.c +++ b/drivers/ata/pata_hpt366.c @@ -27,7 +27,7 @@ #include #define DRV_NAME "pata_hpt366" -#define DRV_VERSION "0.6.7" +#define DRV_VERSION "0.6.8" struct hpt_clock { u8 xfer_mode; @@ -207,17 +207,8 @@ static void hpt366_set_mode(struct ata_port *ap, struct ata_device *adev, { struct hpt_clock *clocks = ap->host->private_data; struct pci_dev *pdev = to_pci_dev(ap->host->dev); - u32 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); - u32 addr2 = 0x51 + 4 * ap->port_no; + u32 addr = 0x40 + 4 * adev->devno; u32 mask, reg; - u8 fast; - - /* Fast interrupt prediction disable, hold off interrupt disable */ - pci_read_config_byte(pdev, addr2, &fast); - if (fast & 0x80) { - fast &= ~0x80; - pci_write_config_byte(pdev, addr2, fast); - } /* determine timing mask and find matching clock entry */ if (mode < XFER_MW_DMA_0) @@ -240,9 +231,9 @@ static void hpt366_set_mode(struct ata_port *ap, struct ata_device *adev, * on-chip PIO FIFO/buffer (and PIO MST mode as well) to avoid * problems handling I/O errors later. */ - pci_read_config_dword(pdev, addr1, ®); + pci_read_config_dword(pdev, addr, ®); reg = ((reg & ~mask) | (clocks->timing & mask)) & ~0xc0000000; - pci_write_config_dword(pdev, addr1, reg); + pci_write_config_dword(pdev, addr, reg); } /**