From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Date: Tue, 15 May 2018 12:20:40 +0000 (+0200)
Subject: arm64: dts: renesas: draak: add X12 input dot clock
X-Git-Tag: v5.15~8134^2~23^2~37
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=856e7e42a4aa9a9acfadf84f4ff2b23ba6c69b11;p=platform%2Fkernel%2Flinux-starfive.git

arm64: dts: renesas: draak: add X12 input dot clock

74.25 Mhz oscillator X12 is connected to DU_DOTCLKIN0.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---

diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index 9d73de8..9d1c339 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -82,6 +82,12 @@
 		regulator-boot-on;
 		regulator-always-on;
 	};
+
+	x12_clk: x12 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <74250000>;
+	};
 };
 
 &extal_clk {
@@ -167,6 +173,11 @@
 	pinctrl-names = "default";
 	status = "okay";
 
+	clocks = <&cpg CPG_MOD 724>,
+		 <&cpg CPG_MOD 723>,
+		 <&x12_clk>;
+	clock-names = "du.0", "du.1", "dclkin.0";
+
 	ports {
 		port@0 {
 			endpoint {