From: Leon Alrae <leon.alrae@imgtec.com>
Date: Thu, 6 Nov 2014 10:29:38 +0000 (+0000)
Subject: target-mips: fix for missing delay slot in BC1EQZ and BC1NEZ
X-Git-Tag: TizenStudio_2.0_p2.3.2~208^2~477^2~2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=854795753c6efceda1d172851e2bae4b47a492be;p=sdk%2Femulator%2Fqemu.git

target-mips: fix for missing delay slot in BC1EQZ and BC1NEZ

New R6 COP1 conditional branches currently don't have delay slot. Fixing this
by setting MIPS_HFLAG_BDS32 flag which is required for branches having 4-byte
delay slot.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
---

diff --git a/target-mips/translate.c b/target-mips/translate.c
index d6722e1..194d4fb 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -8104,6 +8104,7 @@ static void gen_compute_branch1_r6(DisasContext *ctx, uint32_t op,
     MIPS_DEBUG("%s: cond %02x target " TARGET_FMT_lx, opn,
                ctx->hflags, btarget);
     ctx->btarget = btarget;
+    ctx->hflags |= MIPS_HFLAG_BDS32;
 
 out:
     tcg_temp_free_i64(t0);