From: Stafford Horne Date: Tue, 14 Jun 2022 23:54:26 +0000 (+0900) Subject: irqchip: or1k-pic: Undefine mask_ack for level triggered hardware X-Git-Tag: v6.6.17~7131^2~1 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=8520501346ed8d1c4a6dfa751cb57328a9c843f1;p=platform%2Fkernel%2Flinux-rpi.git irqchip: or1k-pic: Undefine mask_ack for level triggered hardware The mask_ack operation clears the interrupt by writing to the PICSR register. This we don't want for level triggered interrupt because it does not actually clear the interrupt on the source hardware. This was causing issues in qemu with multi core setups where interrupts would continue to fire even though they had been cleared in PICSR. Just remove the mask_ack operation. Acked-by: Marc Zyngier Signed-off-by: Stafford Horne --- diff --git a/drivers/irqchip/irq-or1k-pic.c b/drivers/irqchip/irq-or1k-pic.c index 49b47e7..f289ccd 100644 --- a/drivers/irqchip/irq-or1k-pic.c +++ b/drivers/irqchip/irq-or1k-pic.c @@ -66,7 +66,6 @@ static struct or1k_pic_dev or1k_pic_level = { .name = "or1k-PIC-level", .irq_unmask = or1k_pic_unmask, .irq_mask = or1k_pic_mask, - .irq_mask_ack = or1k_pic_mask_ack, }, .handle = handle_level_irq, .flags = IRQ_LEVEL | IRQ_NOPROBE,