From: Kazu Hirata Date: Sun, 7 Nov 2021 02:31:18 +0000 (-0800) Subject: [llvm] Use llvm::reverse (NFC) X-Git-Tag: upstream/15.0.7~26536 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=843d1eda18c3a7a700fe0858748e175727498d21;p=platform%2Fupstream%2Fllvm.git [llvm] Use llvm::reverse (NFC) --- diff --git a/llvm/lib/Analysis/ScalarEvolution.cpp b/llvm/lib/Analysis/ScalarEvolution.cpp index 764c637..5d6b0e4 100644 --- a/llvm/lib/Analysis/ScalarEvolution.cpp +++ b/llvm/lib/Analysis/ScalarEvolution.cpp @@ -12696,7 +12696,7 @@ ScalarEvolution::getLoopDisposition(const SCEV *S, const Loop *L) { Values.emplace_back(L, LoopVariant); LoopDisposition D = computeLoopDisposition(S, L); auto &Values2 = LoopDispositions[S]; - for (auto &V : make_range(Values2.rbegin(), Values2.rend())) { + for (auto &V : llvm::reverse(Values2)) { if (V.getPointer() == L) { V.setInt(D); break; @@ -12804,7 +12804,7 @@ ScalarEvolution::getBlockDisposition(const SCEV *S, const BasicBlock *BB) { Values.emplace_back(BB, DoesNotDominateBlock); BlockDisposition D = computeBlockDisposition(S, BB); auto &Values2 = BlockDispositions[S]; - for (auto &V : make_range(Values2.rbegin(), Values2.rend())) { + for (auto &V : llvm::reverse(Values2)) { if (V.getPointer() == BB) { V.setInt(D); break; diff --git a/llvm/lib/CodeGen/AsmPrinter/DIEHash.cpp b/llvm/lib/CodeGen/AsmPrinter/DIEHash.cpp index 802f0e8..5f4ee74 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DIEHash.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/DIEHash.cpp @@ -93,19 +93,15 @@ void DIEHash::addParentContext(const DIE &Parent) { // Reverse iterate over our list to go from the outermost construct to the // innermost. - for (SmallVectorImpl::reverse_iterator I = Parents.rbegin(), - E = Parents.rend(); - I != E; ++I) { - const DIE &Die = **I; - + for (const DIE *Die : llvm::reverse(Parents)) { // ... Append the letter "C" to the sequence... addULEB128('C'); // ... Followed by the DWARF tag of the construct... - addULEB128(Die.getTag()); + addULEB128(Die->getTag()); // ... Then the name, taken from the DW_AT_name attribute. - StringRef Name = getDIEStringAttr(Die, dwarf::DW_AT_name); + StringRef Name = getDIEStringAttr(*Die, dwarf::DW_AT_name); LLVM_DEBUG(dbgs() << "... adding context: " << Name << "\n"); if (!Name.empty()) addString(Name); diff --git a/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp b/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp index bb24f14..dd79507 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp @@ -252,8 +252,8 @@ void DbgValueHistoryMap::trimLocationRanges( // Now actually remove the entries. Iterate backwards so that our remaining // ToRemove indices are valid after each erase. - for (auto Itr = ToRemove.rbegin(), End = ToRemove.rend(); Itr != End; ++Itr) - HistoryMapEntries.erase(HistoryMapEntries.begin() + *Itr); + for (EntryIndex Idx : llvm::reverse(ToRemove)) + HistoryMapEntries.erase(HistoryMapEntries.begin() + Idx); } } diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp index f1af9e2..976e359 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp @@ -672,7 +672,7 @@ std::string DwarfUnit::getParentContextString(const DIScope *Context) const { // Reverse iterate over our list to go from the outermost construct to the // innermost. - for (const DIScope *Ctx : make_range(Parents.rbegin(), Parents.rend())) { + for (const DIScope *Ctx : llvm::reverse(Parents)) { StringRef Name = Ctx->getName(); if (Name.empty() && isa(Ctx)) Name = "(anonymous namespace)"; diff --git a/llvm/lib/CodeGen/AsmPrinter/EHStreamer.cpp b/llvm/lib/CodeGen/AsmPrinter/EHStreamer.cpp index e589c2e..150f193 100644 --- a/llvm/lib/CodeGen/AsmPrinter/EHStreamer.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/EHStreamer.cpp @@ -812,8 +812,7 @@ void EHStreamer::emitTypeInfos(unsigned TTypeEncoding, MCSymbol *TTBaseLabel) { Entry = TypeInfos.size(); } - for (const GlobalValue *GV : make_range(TypeInfos.rbegin(), - TypeInfos.rend())) { + for (const GlobalValue *GV : llvm::reverse(TypeInfos)) { if (VerboseAsm) Asm->OutStreamer->AddComment("TypeInfo " + Twine(Entry--)); Asm->emitTTypeReference(GV, TTypeEncoding); diff --git a/llvm/lib/CodeGen/BreakFalseDeps.cpp b/llvm/lib/CodeGen/BreakFalseDeps.cpp index b11db3e..558700b 100644 --- a/llvm/lib/CodeGen/BreakFalseDeps.cpp +++ b/llvm/lib/CodeGen/BreakFalseDeps.cpp @@ -244,7 +244,7 @@ void BreakFalseDeps::processUndefReads(MachineBasicBlock *MBB) { MachineInstr *UndefMI = UndefReads.back().first; unsigned OpIdx = UndefReads.back().second; - for (MachineInstr &I : make_range(MBB->rbegin(), MBB->rend())) { + for (MachineInstr &I : llvm::reverse(*MBB)) { // Update liveness, including the current instruction's defs. LiveRegSet.stepBackward(I); diff --git a/llvm/lib/CodeGen/LivePhysRegs.cpp b/llvm/lib/CodeGen/LivePhysRegs.cpp index 6841b2d..d4848f1 100644 --- a/llvm/lib/CodeGen/LivePhysRegs.cpp +++ b/llvm/lib/CodeGen/LivePhysRegs.cpp @@ -252,7 +252,7 @@ void llvm::computeLiveIns(LivePhysRegs &LiveRegs, const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); LiveRegs.init(TRI); LiveRegs.addLiveOutsNoPristines(MBB); - for (const MachineInstr &MI : make_range(MBB.rbegin(), MBB.rend())) + for (const MachineInstr &MI : llvm::reverse(MBB)) LiveRegs.stepBackward(MI); } @@ -289,7 +289,7 @@ void llvm::recomputeLivenessFlags(MachineBasicBlock &MBB) { LiveRegs.init(TRI); LiveRegs.addLiveOutsNoPristines(MBB); - for (MachineInstr &MI : make_range(MBB.rbegin(), MBB.rend())) { + for (MachineInstr &MI : llvm::reverse(MBB)) { // Recompute dead flags. for (MIBundleOperands MO(MI); MO.isValid(); ++MO) { if (!MO->isReg() || !MO->isDef() || MO->isDebug()) diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp index 3b5a974..748218e 100644 --- a/llvm/lib/CodeGen/MachineSink.cpp +++ b/llvm/lib/CodeGen/MachineSink.cpp @@ -476,14 +476,13 @@ bool MachineSinking::runOnMachineFunction(MachineFunction &MF) { // of a def-use chain, if there is any. // TODO: Sort the candidates using a cost-model. unsigned i = 0; - for (auto It = Candidates.rbegin(); It != Candidates.rend(); ++It) { + for (MachineInstr *I : llvm::reverse(Candidates)) { if (i++ == SinkIntoLoopLimit) { LLVM_DEBUG(dbgs() << "LoopSink: Limit reached of instructions to " "be analysed."); break; } - MachineInstr *I = *It; if (!SinkIntoLoop(L, *I)) break; EverMadeChange = true; diff --git a/llvm/lib/CodeGen/ModuloSchedule.cpp b/llvm/lib/CodeGen/ModuloSchedule.cpp index 750097d..43cca1b 100644 --- a/llvm/lib/CodeGen/ModuloSchedule.cpp +++ b/llvm/lib/CodeGen/ModuloSchedule.cpp @@ -700,11 +700,9 @@ void ModuloScheduleExpander::removeDeadInstructions(MachineBasicBlock *KernelBB, MBBVectorTy &EpilogBBs) { // For each epilog block, check that the value defined by each instruction // is used. If not, delete it. - for (MBBVectorTy::reverse_iterator MBB = EpilogBBs.rbegin(), - MBE = EpilogBBs.rend(); - MBB != MBE; ++MBB) - for (MachineBasicBlock::reverse_instr_iterator MI = (*MBB)->instr_rbegin(), - ME = (*MBB)->instr_rend(); + for (MachineBasicBlock *MBB : llvm::reverse(EpilogBBs)) + for (MachineBasicBlock::reverse_instr_iterator MI = MBB->instr_rbegin(), + ME = MBB->instr_rend(); MI != ME;) { // From DeadMachineInstructionElem. Don't delete inline assembly. if (MI->isInlineAsm()) { diff --git a/llvm/lib/CodeGen/ScheduleDAG.cpp b/llvm/lib/CodeGen/ScheduleDAG.cpp index 60f8eec..ef3afab 100644 --- a/llvm/lib/CodeGen/ScheduleDAG.cpp +++ b/llvm/lib/CodeGen/ScheduleDAG.cpp @@ -577,8 +577,7 @@ void ScheduleDAGTopologicalSort::DFS(const SUnit *SU, int UpperBound, SU = WorkList.back(); WorkList.pop_back(); Visited.set(SU->NodeNum); - for (const SDep &SuccDep - : make_range(SU->Succs.rbegin(), SU->Succs.rend())) { + for (const SDep &SuccDep : llvm::reverse(SU->Succs)) { unsigned s = SuccDep.getSUnit()->NodeNum; // Edges to non-SUnits are allowed but ignored (e.g. ExitSU). if (s >= Node2Index.size()) diff --git a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp index 504341e..3f013eb 100644 --- a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp +++ b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp @@ -1112,7 +1112,7 @@ void ScheduleDAGInstrs::fixupKills(MachineBasicBlock &MBB) { LiveRegs.addLiveOuts(MBB); // Examine block from end to start... - for (MachineInstr &MI : make_range(MBB.rbegin(), MBB.rend())) { + for (MachineInstr &MI : llvm::reverse(MBB)) { if (MI.isDebugOrPseudoInstr()) continue; diff --git a/llvm/lib/MC/MachObjectWriter.cpp b/llvm/lib/MC/MachObjectWriter.cpp index 10ae27c..277d88c 100644 --- a/llvm/lib/MC/MachObjectWriter.cpp +++ b/llvm/lib/MC/MachObjectWriter.cpp @@ -965,7 +965,7 @@ uint64_t MachObjectWriter::writeObject(MCAssembler &Asm, // Write the section relocation entries, in reverse order to match 'as' // (approximately, the exact algorithm is more complicated than this). std::vector &Relocs = Relocations[&Sec]; - for (const RelAndSymbol &Rel : make_range(Relocs.rbegin(), Relocs.rend())) { + for (const RelAndSymbol &Rel : llvm::reverse(Relocs)) { W.write(Rel.MRE.r_word0); W.write(Rel.MRE.r_word1); } diff --git a/llvm/lib/Support/Timer.cpp b/llvm/lib/Support/Timer.cpp index d691991..08e1a8a 100644 --- a/llvm/lib/Support/Timer.cpp +++ b/llvm/lib/Support/Timer.cpp @@ -393,8 +393,7 @@ void TimerGroup::PrintQueuedTimers(raw_ostream &OS) { OS << " --- Name ---\n"; // Loop through all of the timing data, printing it out. - for (const PrintRecord &Record : make_range(TimersToPrint.rbegin(), - TimersToPrint.rend())) { + for (const PrintRecord &Record : llvm::reverse(TimersToPrint)) { Record.Time.print(Total, OS); OS << Record.Description << '\n'; } diff --git a/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp b/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp index 79147b1..7243e39 100644 --- a/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp +++ b/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp @@ -378,10 +378,10 @@ static bool foldUnusualPatterns(Function &F, DominatorTree &DT) { // Also, we want to avoid matching partial patterns. // TODO: It would be more efficient if we removed dead instructions // iteratively in this loop rather than waiting until the end. - for (Instruction &I : make_range(BB.rbegin(), BB.rend())) { + for (Instruction &I : llvm::reverse(BB)) { MadeChange |= foldAnyOrAllBitsSet(I); MadeChange |= foldGuardedFunnelShift(I, DT); - MadeChange |= tryToRecognizePopCount(I); + MadeChange |= tryToRecognizePopCount(I); } } diff --git a/llvm/lib/Transforms/Scalar/CallSiteSplitting.cpp b/llvm/lib/Transforms/Scalar/CallSiteSplitting.cpp index 113615a..95de59f 100644 --- a/llvm/lib/Transforms/Scalar/CallSiteSplitting.cpp +++ b/llvm/lib/Transforms/Scalar/CallSiteSplitting.cpp @@ -467,7 +467,7 @@ static PredsWithCondsTy shouldSplitOnPredicatedArgument(CallBase &CB, BasicBlock *StopAt = CSDTNode ? CSDTNode->getIDom()->getBlock() : nullptr; SmallVector, 2> PredsCS; - for (auto *Pred : make_range(Preds.rbegin(), Preds.rend())) { + for (auto *Pred : llvm::reverse(Preds)) { ConditionsTy Conditions; // Record condition on edge BB(CS) <- Pred recordCondition(CB, Pred, CB.getParent(), Conditions); diff --git a/llvm/lib/Transforms/Utils/LoopRotationUtils.cpp b/llvm/lib/Transforms/Utils/LoopRotationUtils.cpp index 692e60a..a2c7fa8 100644 --- a/llvm/lib/Transforms/Utils/LoopRotationUtils.cpp +++ b/llvm/lib/Transforms/Utils/LoopRotationUtils.cpp @@ -404,9 +404,8 @@ bool LoopRotate::rotateLoop(Loop *L, bool SimplifiedLatch) { D->getExpression()}; }; SmallDenseSet DbgIntrinsics; - for (auto I = std::next(OrigPreheader->rbegin()), E = OrigPreheader->rend(); - I != E; ++I) { - if (auto *DII = dyn_cast(&*I)) + for (Instruction &I : llvm::drop_begin(llvm::reverse(*OrigPreheader))) { + if (auto *DII = dyn_cast(&I)) DbgIntrinsics.insert(makeHash(DII)); else break;