From: Jeff Law Date: Wed, 28 Jan 1998 04:51:22 +0000 (+0000) Subject: * mips-dis.c (_print_insn_mips): Set target_processor as appropriate. X-Git-Tag: gdb-4_18~3672 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=83af233519a0e9b955bfb3d5699c09abc6f172cd;p=platform%2Fupstream%2Fbinutils.git * mips-dis.c (_print_insn_mips): Set target_processor as appropriate. Only recognize instructions for the current target_processor. --- diff --git a/opcodes/.Sanitize b/opcodes/.Sanitize index 0f44eb8..2b17516 100644 --- a/opcodes/.Sanitize +++ b/opcodes/.Sanitize @@ -209,7 +209,7 @@ else fi -r5900_files="ChangeLog mips-opc.c" +r5900_files="ChangeLog mips-opc.c mips-dis.c" if ( echo $* | grep keep\-r5900 > /dev/null ) ; then for i in $r5900_files ; do if test ! -d $i && (grep sanitize-r5900 $i > /dev/null) ; then @@ -265,7 +265,7 @@ else done fi -tx19_files="ChangeLog mips16-opc.c" +tx19_files="ChangeLog mips16-opc.c mips-dis.c" if ( echo $* | grep keep\-tx19 > /dev/null ) ; then for i in $tx19_files ; do if test ! -d $i && (grep sanitize-tx19 $i > /dev/null) ; then @@ -293,7 +293,7 @@ else done fi -tx49_files="ChangeLog mips-opc.c" +tx49_files="ChangeLog mips-opc.c mips-dis.c" if ( echo $* | grep keep\-tx49 > /dev/null ) ; then for i in $tx49_files ; do if test ! -d $i && (grep sanitize-tx49 $i > /dev/null) ; then diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 334ea2d..0e732a8 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +Tue Jan 27 21:52:59 1998 Jeffrey A Law (law@cygnus.com) + + * mips-dis.c (_print_insn_mips): Set target_processor as appropriate. + Only recognize instructions for the current target_processor. + start-sanitize-sky Tue Jan 27 14:11:04 1998 Doug Evans diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index 89d3e90..7f3a3a1 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -80,6 +80,10 @@ print_insn_arg (d, l, pc, info) case ',': case '(': case ')': + /* start-sanitize-vr5400 */ + case '[': + case ']': + /* end-sanitize-vr5400 */ (*info->fprintf_func) (info->stream, "%c", *d); break; @@ -211,6 +215,23 @@ print_insn_arg (d, l, pc, info) (l >> OP_SH_CCC) & OP_MASK_CCC); break; + case 'P': + (*info->fprintf_func) (info->stream, "$%d", + (l >> OP_SH_PERFREG) & OP_MASK_PERFREG); + break; + + /* start-sanitize-vr5400 */ + case 'e': + (*info->fprintf_func) (info->stream, "%d", + (l >> OP_SH_VECBYTE) & OP_MASK_VECBYTE); + break; + + case '%': + (*info->fprintf_func) (info->stream, "%d", + (l >> OP_SH_VECALIGN) & OP_MASK_VECALIGN); + break; + /* end-sanitize-vr5400 */ + default: (*info->fprintf_func) (info->stream, "# internal error, undefined modifier(%c)", *d); @@ -230,6 +251,7 @@ _print_insn_mips (memaddr, word, info) struct disassemble_info *info; { register const struct mips_opcode *op; + int target_processor, mips_isa; static boolean init = 0; static const struct mips_opcode *mips_hash[OP_MASK_OP + 1]; @@ -255,6 +277,95 @@ _print_insn_mips (memaddr, word, info) init = 1; } + switch (info->mach) + { + /* start-sanitize-tx19 */ + case bfd_mach_mips1900: + target_processor = 1900; + mips_isa = 1; + break; + /* end-sanitize-tx19 */ + case bfd_mach_mips3000: + target_processor = 3000; + mips_isa = 1; + break; + case bfd_mach_mips3900: + target_processor = 3900; + mips_isa = 1; + break; + case bfd_mach_mips4000: + target_processor = 4000; + mips_isa = 3; + break; + case bfd_mach_mips4010: + target_processor = 4010; + mips_isa = 2; + break; + case bfd_mach_mips4100: + target_processor = 4100; + mips_isa = 3; + break; + case bfd_mach_mips4300: + target_processor = 4300; + mips_isa = 3; + break; + case bfd_mach_mips4400: + target_processor = 4400; + mips_isa = 3; + break; + case bfd_mach_mips4600: + target_processor = 4600; + mips_isa = 3; + break; + case bfd_mach_mips4650: + target_processor = 4650; + mips_isa = 3; + break; + /* start-sanitize-tx49 */ + case bfd_mach_mips4900: + target_processor = 4900; + mips_isa = 3; + break; + /* end-sanitize-tx49 */ + case bfd_mach_mips5000: + target_processor = 5000; + mips_isa = 4; + break; + /* start-sanitize-vr5400 */ + case bfd_mach_mips5400: + target_processor = 5400; + mips_isa = 3; + break; + /* end-sanitize-vr5400 */ + /* start-sanitize-r5900 */ + case bfd_mach_mips5900: + target_processor = 5900; + mips_isa = 3; + break; + /* end-sanitize-r5900 */ + case bfd_mach_mips6000: + target_processor = 6000; + mips_isa = 2; + break; + case bfd_mach_mips8000: + target_processor = 8000; + mips_isa = 4; + break; + case bfd_mach_mips10000: + target_processor = 10000; + mips_isa = 4; + break; + case bfd_mach_mips16: + target_processor = 16; + mips_isa = 3; + break; + default: + target_processor = 3000; + mips_isa = 3; + break; + + } + info->bytes_per_chunk = 4; info->display_endian = info->endian; @@ -266,6 +377,41 @@ _print_insn_mips (memaddr, word, info) if (op->pinfo != INSN_MACRO && (word & op->mask) == op->match) { register const char *d; + int insn_isa; + + if ((op->membership & INSN_ISA) == INSN_ISA1) + insn_isa = 1; + else if ((op->membership & INSN_ISA) == INSN_ISA2) + insn_isa = 2; + else if ((op->membership & INSN_ISA) == INSN_ISA3) + insn_isa = 3; + else if ((op->membership & INSN_ISA) == INSN_ISA4) + insn_isa = 4; + else + insn_isa = 15; + + if (insn_isa > mips_isa + && (target_processor == 4650 + && op->membership & INSN_4650) == 0 + && (target_processor == 4010 + && op->membership & INSN_4010) == 0 + && (target_processor == 4100 + && op->membership & INSN_4100) == 0 + /* start-sanitize-vr5400 */ + && (target_processor == 5400 + && op->membership & INSN_5400) == 0 + /* end-santiize-vr5400 */ + /* start-sanitize-r5900 */ + && (target_processor == 5900 + && op->membership & INSN_5900) == 0 + /* end-sanitize-r5900 */ + /* start-sanitize-tx49 */ + && (target_processor == 4900 + && op->membership & INSN_4900) == 0 + /* end-sanitize-tx49 */ + && (target_processor == 3900 + && op->membership & INSN_3900) == 0) + continue; (*info->fprintf_func) (info->stream, "%s", op->name); @@ -786,7 +932,7 @@ print_mips16_insn_arg (type, op, l, use_extend, extend, memaddr, info) baseaddr = memaddr + 2; } else if (use_extend) - baseaddr = memaddr; + baseaddr = memaddr - 2; else { int status;