From: Chris Demetriou Date: Wed, 18 Dec 2002 22:52:48 +0000 (+0000) Subject: [ opcodes/ChangeLog ] X-Git-Tag: cagney-unwind-20030108-branchpoint~279 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=82dd009716af56290572a3797e5c81e50d1e1b5e;p=platform%2Fupstream%2Fbinutils.git [ opcodes/ChangeLog ] 2002-12-18 Chris Demetriou * mips-opc.c (mips_builtin_opcodes): Remove one "ror" and two "dror" entries, and reorder the remaining "dror" and "ror" entries. [ gas/ChangeLog ] 2002-12-18 Chris Demetriou * config/tc-mips.c (macro): In M_DROL, M_DROR, M_ROL, and M_ROR, use hardware rotate ops as appropriate. In M_DROL_I, M_DROR_I, M_ROL_I, and M_ROR_I, simplify code, clean up warnings, and arrange not to issue warnings about use of AT when AT is not actually used. [ gas/testsuite/ChangeLog ] 2002-12-18 Chris Demetriou * gas/mips/rol.s: Add ".set noat" and some new instructions to test. * gas/mips/rol64.s: Likewise. * gas/mips/rol.l: New file. * gas/mips/rol.d: Adjust to use rol.l and for rol.s changes. * gas/mips/rol64.l: New file. * gas/mips/rol64.d: Adjust to use rol64.l and for rol64.s changes. * gas/mips/rol-hw.d: New file. * gas/mips/rol-hw.l: New file. * gas/mips/rol64-hw.d: New file. * gas/mips/rol64-hw.l: New file. * gas/mips/mips.exp: Run rol-hw and rol64-hw tests. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index 38634c22..8a73343 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,11 @@ +2002-12-18 Chris Demetriou + + * config/tc-mips.c (macro): In M_DROL, M_DROR, M_ROL, and M_ROR, + use hardware rotate ops as appropriate. In M_DROL_I, M_DROR_I, + M_ROL_I, and M_ROR_I, simplify code, clean up warnings, and + arrange not to issue warnings about use of AT when AT is not + actually used. + 2002-12-17 Nick Clifton * as.c (std_longopts): Duplicate --keep-locals entry in order to diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 15ada2c..2a2f11c 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -6940,6 +6940,26 @@ macro2 (ip) break; case M_DROL: + if (CPU_HAS_DROR (mips_arch)) + { + if (dreg == sreg) + { + tempreg = AT; + used_at = 1; + } + else + { + tempreg = dreg; + used_at = 0; + } + macro_build ((char *) NULL, &icnt, NULL, "dnegu", + "d,w", tempreg, treg); + macro_build ((char *) NULL, &icnt, NULL, "drorv", + "d,t,s", dreg, sreg, tempreg); + if (used_at) + break; + return; + } macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu", "d,v,t", AT, 0, treg); macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv", @@ -6951,6 +6971,26 @@ macro2 (ip) break; case M_ROL: + if (CPU_HAS_ROR (mips_arch)) + { + if (dreg == sreg) + { + tempreg = AT; + used_at = 1; + } + else + { + tempreg = dreg; + used_at = 0; + } + macro_build ((char *) NULL, &icnt, NULL, "negu", + "d,w", tempreg, treg); + macro_build ((char *) NULL, &icnt, NULL, "rorv", + "d,t,s", dreg, sreg, tempreg); + if (used_at) + break; + return; + } macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "subu", "d,v,t", AT, 0, treg); macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srlv", @@ -6964,9 +7004,10 @@ macro2 (ip) case M_DROL_I: { unsigned int rot; + char *l, *r; if (imm_expr.X_op != O_constant) - as_bad (_("rotate count too large")); + as_bad (_("Improper rotate count")); rot = imm_expr.X_add_number & 0x3f; if (CPU_HAS_DROR (mips_arch)) { @@ -6977,25 +7018,23 @@ macro2 (ip) else macro_build ((char *) NULL, &icnt, NULL, "dror", "d,w,<", dreg, sreg, rot); - break; + return; } if (rot == 0) - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrl", - "d,w,<", dreg, sreg, 0); - else { - char *l, *r; - - l = (rot < 0x20) ? "dsll" : "dsll32"; - r = ((0x40 - rot) < 0x20) ? "dsrl" : "dsrl32"; - rot &= 0x1f; - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l, - "d,w,<", AT, sreg, rot); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r, - "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", - "d,v,t", dreg, dreg, AT); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrl", + "d,w,<", dreg, sreg, 0); + return; } + l = (rot < 0x20) ? "dsll" : "dsll32"; + r = ((0x40 - rot) < 0x20) ? "dsrl" : "dsrl32"; + rot &= 0x1f; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l, + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r, + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); } break; @@ -7004,30 +7043,36 @@ macro2 (ip) unsigned int rot; if (imm_expr.X_op != O_constant) - as_bad (_("rotate count too large")); + as_bad (_("Improper rotate count")); rot = imm_expr.X_add_number & 0x1f; if (CPU_HAS_ROR (mips_arch)) { macro_build ((char *) NULL, &icnt, NULL, "ror", "d,w,<", dreg, sreg, (32 - rot) & 0x1f); - break; + return; } if (rot == 0) - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", - "d,w,<", dreg, sreg, 0); - else { - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", - "d,w,<", AT, sreg, rot); macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", - "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", - "d,v,t", dreg, dreg, AT); + "d,w,<", dreg, sreg, 0); + return; } + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); } break; case M_DROR: + if (CPU_HAS_DROR (mips_arch)) + { + macro_build ((char *) NULL, &icnt, NULL, "drorv", + "d,t,s", dreg, sreg, treg); + return; + } macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu", "d,v,t", AT, 0, treg); macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv", @@ -7039,6 +7084,12 @@ macro2 (ip) break; case M_ROR: + if (CPU_HAS_ROR (mips_arch)) + { + macro_build ((char *) NULL, &icnt, NULL, "rorv", + "d,t,s", dreg, sreg, treg); + return; + } macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "subu", "d,v,t", AT, 0, treg); macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sllv", @@ -7052,27 +7103,36 @@ macro2 (ip) case M_DROR_I: { unsigned int rot; + char *l, *r; if (imm_expr.X_op != O_constant) - as_bad (_("rotate count too large")); + as_bad (_("Improper rotate count")); rot = imm_expr.X_add_number & 0x3f; + if (CPU_HAS_DROR (mips_arch)) + { + if (rot >= 32) + macro_build ((char *) NULL, &icnt, NULL, "dror32", + "d,w,<", dreg, sreg, rot - 32); + else + macro_build ((char *) NULL, &icnt, NULL, "dror", + "d,w,<", dreg, sreg, rot); + return; + } if (rot == 0) - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrl", - "d,w,<", dreg, sreg, 0); - else { - char *l, *r; - - r = (rot < 0x20) ? "dsrl" : "dsrl32"; - l = ((0x40 - rot) < 0x20) ? "dsll" : "dsll32"; - rot &= 0x1f; - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r, - "d,w,<", AT, sreg, rot); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l, - "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", - "d,v,t", dreg, dreg, AT); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrl", + "d,w,<", dreg, sreg, 0); + return; } + r = (rot < 0x20) ? "dsrl" : "dsrl32"; + l = ((0x40 - rot) < 0x20) ? "dsll" : "dsll32"; + rot &= 0x1f; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r, + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l, + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); } break; @@ -7081,20 +7141,26 @@ macro2 (ip) unsigned int rot; if (imm_expr.X_op != O_constant) - as_bad (_("rotate count too large")); + as_bad (_("Improper rotate count")); rot = imm_expr.X_add_number & 0x1f; + if (CPU_HAS_ROR (mips_arch)) + { + macro_build ((char *) NULL, &icnt, NULL, "ror", + "d,w,<", dreg, sreg, rot); + return; + } if (rot == 0) - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", - "d,w,<", dreg, sreg, 0); - else { macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", - "d,w,<", AT, sreg, rot); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", - "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", - "d,v,t", dreg, dreg, AT); + "d,w,<", dreg, sreg, 0); + return; } + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); } break; diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 029ed26..d32cb23 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,17 @@ +2002-12-18 Chris Demetriou + + * gas/mips/rol.s: Add ".set noat" and some new instructions to test. + * gas/mips/rol64.s: Likewise. + * gas/mips/rol.l: New file. + * gas/mips/rol.d: Adjust to use rol.l and for rol.s changes. + * gas/mips/rol64.l: New file. + * gas/mips/rol64.d: Adjust to use rol64.l and for rol64.s changes. + * gas/mips/rol-hw.d: New file. + * gas/mips/rol-hw.l: New file. + * gas/mips/rol64-hw.d: New file. + * gas/mips/rol64-hw.l: New file. + * gas/mips/mips.exp: Run rol-hw and rol64-hw tests. + 2002-12-12 Alexandre Oliva * gas/mips/beq.d: Comment out branches to undefined symbols, diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index 89437d8..b47499c 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -125,7 +125,9 @@ if { [istarget mips*-*-*] } then { run_dump_test "mul" } run_dump_test "rol" + run_dump_test "rol-hw" run_dump_test "rol64" + run_dump_test "rol64-hw" if !$aout { run_dump_test "sb" } run_dump_test "trunc" if !$aout { run_dump_test "ulh" } diff --git a/gas/testsuite/gas/mips/rol-hw.d b/gas/testsuite/gas/mips/rol-hw.d new file mode 100644 index 0000000..30521a7 --- /dev/null +++ b/gas/testsuite/gas/mips/rol-hw.d @@ -0,0 +1,30 @@ +#objdump: -dr --prefix-addresses -mmips:5400 +#as: -march=vr5400 -mtune=vr5400 +#name: MIPS hardware rol (vr5400) +#source: rol.s +#stderr: rol-hw.l + +# Test the rol and ror macros. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> negu at,a1 +0+0004 <[^>]*> rorv a0,a0,at +0+0008 <[^>]*> negu a0,a2 +0+000c <[^>]*> rorv a0,a1,a0 +0+0010 <[^>]*> ror a0,a0,0x1f +0+0014 <[^>]*> ror a0,a1,0x1f +0+0018 <[^>]*> ror a0,a1,0x0 +0+001c <[^>]*> rorv a0,a0,a1 +0+0020 <[^>]*> rorv a0,a1,a2 +0+0024 <[^>]*> ror a0,a0,0x1 +0+0028 <[^>]*> ror a0,a1,0x1 +0+002c <[^>]*> ror a0,a1,0x0 +0+0030 <[^>]*> ror a0,a1,0x0 +0+0034 <[^>]*> ror a0,a1,0x1f +0+0038 <[^>]*> ror a0,a1,0x1 +0+003c <[^>]*> ror a0,a1,0x0 +0+0040 <[^>]*> ror a0,a1,0x1 +0+0044 <[^>]*> ror a0,a1,0x1f + ... diff --git a/gas/testsuite/gas/mips/rol-hw.l b/gas/testsuite/gas/mips/rol-hw.l new file mode 100644 index 0000000..19a5dc4 --- /dev/null +++ b/gas/testsuite/gas/mips/rol-hw.l @@ -0,0 +1,2 @@ +.*: Assembler messages: +.*:7: Warning: Macro used \$at after "\.set noat" diff --git a/gas/testsuite/gas/mips/rol.d b/gas/testsuite/gas/mips/rol.d index 2128dd5..84ce2ef 100644 --- a/gas/testsuite/gas/mips/rol.d +++ b/gas/testsuite/gas/mips/rol.d @@ -1,6 +1,7 @@ #objdump: -dr --prefix-addresses -mmips:3000 #as: -march=r3000 -mtune=r3000 -#name: MIPS R3000 rol +#name: MIPS macro rol (r3000) +#stderr: rol.l # Test the rol and ror macros. @@ -37,4 +38,18 @@ Disassembly of section .text: 0+006c <[^>]*> sll a0,a1,0x1f 0+0070 <[^>]*> or a0,a0,at 0+0074 <[^>]*> srl a0,a1,0x0 +0+0078 <[^>]*> srl a0,a1,0x0 +0+007c <[^>]*> sll at,a1,0x1 +0+0080 <[^>]*> srl a0,a1,0x1f +0+0084 <[^>]*> or a0,a0,at +0+0088 <[^>]*> sll at,a1,0x1f +0+008c <[^>]*> srl a0,a1,0x1 +0+0090 <[^>]*> or a0,a0,at +0+0094 <[^>]*> srl a0,a1,0x0 +0+0098 <[^>]*> srl at,a1,0x1 +0+009c <[^>]*> sll a0,a1,0x1f +0+00a0 <[^>]*> or a0,a0,at +0+00a4 <[^>]*> srl at,a1,0x1f +0+00a8 <[^>]*> sll a0,a1,0x1 +0+00ac <[^>]*> or a0,a0,at ... diff --git a/gas/testsuite/gas/mips/rol.l b/gas/testsuite/gas/mips/rol.l new file mode 100644 index 0000000..441597e --- /dev/null +++ b/gas/testsuite/gas/mips/rol.l @@ -0,0 +1,13 @@ +.*: Assembler messages: +.*:7: Warning: Macro used \$at after "\.set noat" +.*:8: Warning: Macro used \$at after "\.set noat" +.*:9: Warning: Macro used \$at after "\.set noat" +.*:10: Warning: Macro used \$at after "\.set noat" +.*:13: Warning: Macro used \$at after "\.set noat" +.*:14: Warning: Macro used \$at after "\.set noat" +.*:15: Warning: Macro used \$at after "\.set noat" +.*:16: Warning: Macro used \$at after "\.set noat" +.*:20: Warning: Macro used \$at after "\.set noat" +.*:21: Warning: Macro used \$at after "\.set noat" +.*:24: Warning: Macro used \$at after "\.set noat" +.*:25: Warning: Macro used \$at after "\.set noat" diff --git a/gas/testsuite/gas/mips/rol.s b/gas/testsuite/gas/mips/rol.s index 988d702..017c002 100644 --- a/gas/testsuite/gas/mips/rol.s +++ b/gas/testsuite/gas/mips/rol.s @@ -1,5 +1,8 @@ # Source file used to test the rol and ror macros. + # generate warnings for all uses of AT. + .set noat + foo: rol $4,$5 rol $4,$5,$6 @@ -12,4 +15,13 @@ foo: ror $4,1 ror $4,$5,1 ror $4,$5,0 + + rol $4,$5,32 + rol $4,$5,33 + rol $4,$5,63 + + ror $4,$5,32 + ror $4,$5,33 + ror $4,$5,63 + .space 8 diff --git a/gas/testsuite/gas/mips/rol64-hw.d b/gas/testsuite/gas/mips/rol64-hw.d new file mode 100644 index 0000000..e0a5425 --- /dev/null +++ b/gas/testsuite/gas/mips/rol64-hw.d @@ -0,0 +1,44 @@ +#objdump: -dr --prefix-addresses -mmips:5400 +#as: -march=vr5400 -mtune=vr5400 +#name: MIPS hardware drol (vr5400) +#source: rol64.s +#stderr: rol64-hw.l + +# Test the drol and dror macros. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> dnegu at,a1 +0+0004 <[^>]*> drorv a0,a0,at +0+0008 <[^>]*> dnegu a0,a2 +0+000c <[^>]*> drorv a0,a1,a0 +0+0010 <[^>]*> dror32 a0,a0,0x1f +0+0014 <[^>]*> dror a0,a1,0x0 +0+0018 <[^>]*> dror32 a0,a1,0x1f +0+001c <[^>]*> dror32 a0,a1,0x1 +0+0020 <[^>]*> dror32 a0,a1,0x0 +0+0024 <[^>]*> dror a0,a1,0x1f +0+0028 <[^>]*> dror a0,a1,0x1 +0+002c <[^>]*> dror a0,a1,0x0 +0+0030 <[^>]*> drorv a0,a0,a1 +0+0034 <[^>]*> drorv a0,a1,a2 +0+0038 <[^>]*> dror a0,a0,0x1 +0+003c <[^>]*> dror a0,a1,0x0 +0+0040 <[^>]*> dror a0,a1,0x1 +0+0044 <[^>]*> dror a0,a1,0x1f +0+0048 <[^>]*> dror32 a0,a1,0x0 +0+004c <[^>]*> dror32 a0,a1,0x1 +0+0050 <[^>]*> dror32 a0,a1,0x1f +0+0054 <[^>]*> dror a0,a1,0x0 +0+0058 <[^>]*> dror32 a0,a1,0x1f +0+005c <[^>]*> dror32 a0,a1,0x1 +0+0060 <[^>]*> dror32 a0,a1,0x0 +0+0064 <[^>]*> dror a0,a1,0x1f +0+0068 <[^>]*> dror a0,a1,0x1 +0+006c <[^>]*> dror a0,a1,0x1 +0+0070 <[^>]*> dror a0,a1,0x1f +0+0074 <[^>]*> dror32 a0,a1,0x0 +0+0078 <[^>]*> dror32 a0,a1,0x1 +0+007c <[^>]*> dror32 a0,a1,0x1f + ... diff --git a/gas/testsuite/gas/mips/rol64-hw.l b/gas/testsuite/gas/mips/rol64-hw.l new file mode 100644 index 0000000..19a5dc4 --- /dev/null +++ b/gas/testsuite/gas/mips/rol64-hw.l @@ -0,0 +1,2 @@ +.*: Assembler messages: +.*:7: Warning: Macro used \$at after "\.set noat" diff --git a/gas/testsuite/gas/mips/rol64.d b/gas/testsuite/gas/mips/rol64.d index 32b132b..979ec51 100644 --- a/gas/testsuite/gas/mips/rol64.d +++ b/gas/testsuite/gas/mips/rol64.d @@ -1,6 +1,7 @@ #objdump: -dr --prefix-addresses -mmips:4000 #as: -march=r4000 -mtune=r4000 -#name: MIPS R4000 drol +#name: MIPS macro drol (r4000) +#stderr: rol64.l # Test the drol and dror macros. @@ -63,4 +64,34 @@ Disassembly of section .text: 0+00d4 <[^>]*> dsll a0,a1,0x1 0+00d8 <[^>]*> or a0,a0,at 0+00dc <[^>]*> dsrl a0,a1,0x0 +0+00e0 <[^>]*> dsll at,a1,0x1 +0+00e4 <[^>]*> dsrl32 a0,a1,0x1f +0+00e8 <[^>]*> or a0,a0,at +0+00ec <[^>]*> dsll at,a1,0x1f +0+00f0 <[^>]*> dsrl32 a0,a1,0x1 +0+00f4 <[^>]*> or a0,a0,at +0+00f8 <[^>]*> dsll32 at,a1,0x0 +0+00fc <[^>]*> dsrl32 a0,a1,0x0 +0+0100 <[^>]*> or a0,a0,at +0+0104 <[^>]*> dsll32 at,a1,0x1 +0+0108 <[^>]*> dsrl a0,a1,0x1f +0+010c <[^>]*> or a0,a0,at +0+0110 <[^>]*> dsll32 at,a1,0x1f +0+0114 <[^>]*> dsrl a0,a1,0x1 +0+0118 <[^>]*> or a0,a0,at +0+011c <[^>]*> dsrl at,a1,0x1 +0+0120 <[^>]*> dsll32 a0,a1,0x1f +0+0124 <[^>]*> or a0,a0,at +0+0128 <[^>]*> dsrl at,a1,0x1f +0+012c <[^>]*> dsll32 a0,a1,0x1 +0+0130 <[^>]*> or a0,a0,at +0+0134 <[^>]*> dsrl32 at,a1,0x0 +0+0138 <[^>]*> dsll32 a0,a1,0x0 +0+013c <[^>]*> or a0,a0,at +0+0140 <[^>]*> dsrl32 at,a1,0x1 +0+0144 <[^>]*> dsll a0,a1,0x1f +0+0148 <[^>]*> or a0,a0,at +0+014c <[^>]*> dsrl32 at,a1,0x1f +0+0150 <[^>]*> dsll a0,a1,0x1 +0+0154 <[^>]*> or a0,a0,at ... diff --git a/gas/testsuite/gas/mips/rol64.l b/gas/testsuite/gas/mips/rol64.l new file mode 100644 index 0000000..4a4e74c --- /dev/null +++ b/gas/testsuite/gas/mips/rol64.l @@ -0,0 +1,27 @@ +.*: Assembler messages: +.*:7: Warning: Macro used \$at after "\.set noat" +.*:8: Warning: Macro used \$at after "\.set noat" +.*:9: Warning: Macro used \$at after "\.set noat" +.*:11: Warning: Macro used \$at after "\.set noat" +.*:12: Warning: Macro used \$at after "\.set noat" +.*:13: Warning: Macro used \$at after "\.set noat" +.*:14: Warning: Macro used \$at after "\.set noat" +.*:15: Warning: Macro used \$at after "\.set noat" +.*:18: Warning: Macro used \$at after "\.set noat" +.*:19: Warning: Macro used \$at after "\.set noat" +.*:20: Warning: Macro used \$at after "\.set noat" +.*:22: Warning: Macro used \$at after "\.set noat" +.*:23: Warning: Macro used \$at after "\.set noat" +.*:24: Warning: Macro used \$at after "\.set noat" +.*:25: Warning: Macro used \$at after "\.set noat" +.*:26: Warning: Macro used \$at after "\.set noat" +.*:29: Warning: Macro used \$at after "\.set noat" +.*:30: Warning: Macro used \$at after "\.set noat" +.*:31: Warning: Macro used \$at after "\.set noat" +.*:32: Warning: Macro used \$at after "\.set noat" +.*:33: Warning: Macro used \$at after "\.set noat" +.*:35: Warning: Macro used \$at after "\.set noat" +.*:36: Warning: Macro used \$at after "\.set noat" +.*:37: Warning: Macro used \$at after "\.set noat" +.*:38: Warning: Macro used \$at after "\.set noat" +.*:39: Warning: Macro used \$at after "\.set noat" diff --git a/gas/testsuite/gas/mips/rol64.s b/gas/testsuite/gas/mips/rol64.s index 3e71732..49a5717 100644 --- a/gas/testsuite/gas/mips/rol64.s +++ b/gas/testsuite/gas/mips/rol64.s @@ -1,5 +1,8 @@ # Source file used to test the drol and dror macros. + # generate warnings for all uses of AT. + .set noat + foo: drol $4,$5 drol $4,$5,$6 @@ -23,5 +26,17 @@ foo: dror $4,$5,63 dror $4,$5,64 + drol $4,$5,65 + drol $4,$5,95 + drol $4,$5,96 + drol $4,$5,97 + drol $4,$5,127 + + dror $4,$5,65 + dror $4,$5,95 + dror $4,$5,96 + dror $4,$5,97 + dror $4,$5,127 + # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... .space 8 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 92715e3..9b6cc95 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2002-12-18 Chris Demetriou + + * mips-opc.c (mips_builtin_opcodes): Remove one "ror" and two + "dror" entries, and reorder the remaining "dror" and "ror" entries. + 2002-12-16 DJ Delorie * xstormy16-asm.c (parse_immediate16): Add prototype. diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 7dae28a..61a2ebd 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -550,13 +550,11 @@ const struct mips_opcode mips_builtin_opcodes[] = {"dret", "", 0x7000003e, 0xffffffff, 0, N5 }, {"drol", "d,v,t", 0, (int) M_DROL, INSN_MACRO, I3 }, {"drol", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, I3 }, -{"drorv", "d,t,s", 0x00000056, 0xfc0007ff, RD_t|RD_s|WR_d, N5 }, -{"dror32", "d,w,<", 0x0020003e, 0xffe0003f, WR_d|RD_t, N5 }, -{"dror", "d,w,s", 0x00000056, 0xfc0007ff, RD_t|RD_s|WR_d, N5 }, /* drorv */ -{"dror", "d,w,>", 0x0020003e, 0xffe0003f, WR_d|RD_t, N5 }, -{"dror", "d,w,<", 0x0020003a, 0xffe0003f, WR_d|RD_t, N5 }, {"dror", "d,v,t", 0, (int) M_DROR, INSN_MACRO, I3 }, {"dror", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, I3 }, +{"dror", "d,w,<", 0x0020003a, 0xffe0003f, WR_d|RD_t, N5 }, +{"drorv", "d,t,s", 0x00000056, 0xfc0007ff, RD_t|RD_s|WR_d, N5 }, +{"dror32", "d,w,<", 0x0020003e, 0xffe0003f, WR_d|RD_t, N5 }, {"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, {"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 }, {"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */ @@ -901,11 +899,10 @@ const struct mips_opcode mips_builtin_opcodes[] = {"rneu.qh", "X,Q", 0x78200022, 0xfc20f83f, WR_D|RD_MACC|RD_T|FP_D, MX }, {"rol", "d,v,t", 0, (int) M_ROL, INSN_MACRO, I1 }, {"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, I1 }, -{"rorv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, N5 }, -{"ror", "d,w,s", 0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, N5 }, /* rorv */ -{"ror", "d,w,<", 0x00200002, 0xffe0003f, WR_d|RD_t, N5 }, {"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, I1 }, {"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, I1 }, +{"ror", "d,w,<", 0x00200002, 0xffe0003f, WR_d|RD_t, N5 }, +{"rorv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, N5 }, {"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|FP_D, I3 }, {"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|FP_S, I3 }, {"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|FP_D, I2 },