From: Paul Gilliam Date: Thu, 1 Sep 2005 18:09:41 +0000 (+0000) Subject: 20050901 Paul Gilliam X-Git-Tag: gdb-csl-arm-20051020-branchpoint~341 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=826d537610a64d140eb715fba9cd29d834bbfc14;p=external%2Fbinutils.git 20050901 Paul Gilliam * ppc-tdep.h (struct gdbarch_tdep): Better explanation of using -1 for nonexistant registers. * rs6000-tdep.c (rs6000_register_reggroup_p): Don't assume that tdep->ppc_vr0_regnum and tdep->ppc_ev0_regnum are not -1. --- diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 4dc536d..86a149c 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,10 @@ +20050901 Paul Gilliam + + * ppc-tdep.h (struct gdbarch_tdep): Better explanation of using + -1 for nonexistant registers. + * rs6000-tdep.c (rs6000_register_reggroup_p): Don't assume that + tdep->ppc_vr0_regnum and tdep->ppc_ev0_regnum are not -1. + 2005-09-01 Richard Earnshaw * arm-linux-tdep.c (arm_linux_push_arguments): Delete. diff --git a/gdb/ppc-tdep.h b/gdb/ppc-tdep.h index a2c77da..5037c11 100644 --- a/gdb/ppc-tdep.h +++ b/gdb/ppc-tdep.h @@ -152,26 +152,33 @@ struct gdbarch_tdep int ppc_ctr_regnum; /* Count register */ int ppc_xer_regnum; /* Integer exception register */ - /* On PPC and RS6000 variants that have no floating-point - registers, the next two members will be -1. */ + /* Not all PPC and RS6000 variants will have the registers + represented below. A -1 is used to indicate that the register + is not present in this variant. */ + + /* Floating-point registers. */ int ppc_fp0_regnum; /* floating-point register 0 */ - int ppc_fpscr_regnum; /* Floating point status and condition - register */ + int ppc_fpscr_regnum; /* fp status and condition register */ + + /* Segment registers. */ + int ppc_sr0_regnum; /* segment register 0 */ - int ppc_sr0_regnum; /* segment register 0, or -1 on - variants that have no segment - registers. */ + /* Multiplier-Quotient Register (older POWER architectures only). */ + int ppc_mq_regnum; - int ppc_mq_regnum; /* Multiply/Divide extension register */ + /* Altivec registers. */ int ppc_vr0_regnum; /* First AltiVec register */ int ppc_vrsave_regnum; /* Last AltiVec register */ + + /* SPE registers. */ int ppc_ev0_upper_regnum; /* First GPR upper half register */ int ppc_ev0_regnum; /* First ev register */ int ppc_ev31_regnum; /* Last ev register */ int ppc_acc_regnum; /* SPE 'acc' register */ int ppc_spefscr_regnum; /* SPE 'spefscr' register */ - int lr_frame_offset; /* Offset to ABI specific location where - link register is saved. */ + + /* Offset to ABI specific location where link register is saved. */ + int lr_frame_offset; /* An array of integers, such that sim_regno[I] is the simulator register number for GDB register number I, or -1 if the diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c index 7f37d3e..fb350ef 100644 --- a/gdb/rs6000-tdep.c +++ b/gdb/rs6000-tdep.c @@ -1882,9 +1882,11 @@ rs6000_register_reggroup_p (struct gdbarch *gdbarch, int regnum, if (group == float_reggroup) return float_p; - vector_p = ((regnum >= tdep->ppc_vr0_regnum + vector_p = ((tdep->ppc_vr0_regnum >= 0 + && regnum >= tdep->ppc_vr0_regnum && regnum < tdep->ppc_vr0_regnum + 32) - || (regnum >= tdep->ppc_ev0_regnum + || (tdep->ppc_ev0_regnum >= 0 + && regnum >= tdep->ppc_ev0_regnum && regnum < tdep->ppc_ev0_regnum + 32) || regnum == tdep->ppc_vrsave_regnum || regnum == tdep->ppc_acc_regnum