From: Emil Renner Berthing <kernel@esmil.dk>
Date: Sat, 20 Nov 2021 16:13:22 +0000 (+0100)
Subject: RISC-V: Add StarFive JH7100 audio clock node
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=82159f21bb7746040a58ac6698954f64d41ce6c9;p=platform%2Fkernel%2Flinux-starfive.git

RISC-V: Add StarFive JH7100 audio clock node

Add device tree node for the audio clocks on the StarFive JH7100 RISC-V
SoC.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
---

diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi
index 08eca47..571667b 100644
--- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
@@ -133,6 +133,16 @@
 			riscv,ndev = <133>;
 		};
 
+		audclk: clock-controller@10480000 {
+			compatible = "starfive,jh7100-audclk";
+			reg = <0x0 0x10480000 0x0 0x10000>;
+			clocks = <&clkgen JH7100_CLK_AUDIO_SRC>,
+				 <&clkgen JH7100_CLK_AUDIO_12288>,
+				 <&clkgen JH7100_CLK_DOM7AHB_BUS>;
+			clock-names = "audio_src", "audio_12288", "dom7ahb_bus";
+			#clock-cells = <1>;
+		};
+
 		clkgen: clock-controller@11800000 {
 			compatible = "starfive,jh7100-clkgen";
 			reg = <0x0 0x11800000 0x0 0x10000>;