From: Sagar Ghuge <sagar.ghuge@intel.com>
Date: Wed, 14 Aug 2019 20:58:57 +0000 (-0700)
Subject: iris: Prepare stencil resource before clear depth stencil
X-Git-Tag: upstream/19.3.0~237
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=81de49a9f28482d262c875569ca1412989e88b06;p=platform%2Fupstream%2Fmesa.git

iris: Prepare stencil resource before clear depth stencil

Let aux surface state tracker track the stencil buffer's aux state while
clearing depth stencil buffer.

v2: Fix condition check (Nanley Chery)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
---

diff --git a/src/gallium/drivers/iris/iris_clear.c b/src/gallium/drivers/iris/iris_clear.c
index 309fda6..cdc9647 100644
--- a/src/gallium/drivers/iris/iris_clear.c
+++ b/src/gallium/drivers/iris/iris_clear.c
@@ -590,7 +590,10 @@ clear_depth_stencil(struct iris_context *ice,
    struct blorp_batch blorp_batch;
    blorp_batch_init(&ice->blorp, &blorp_batch, batch, blorp_flags);
 
-   if (stencil_res) {
+   uint8_t stencil_mask = clear_stencil && stencil_res ? 0xff : 0;
+   if (stencil_mask) {
+      iris_resource_prepare_access(ice, batch, stencil_res, level, 1, box->z,
+                                   box->depth, stencil_res->aux.usage, false);
       iris_blorp_surf_for_resource(&ice->vtbl, &stencil_surf,
                                    &stencil_res->base, stencil_res->aux.usage,
                                    level, true);
@@ -602,7 +605,7 @@ clear_depth_stencil(struct iris_context *ice,
                              box->x + box->width,
                              box->y + box->height,
                              clear_depth && z_res, depth,
-                             clear_stencil && stencil_res ? 0xff : 0, stencil);
+                             stencil_mask, stencil);
 
    blorp_batch_finish(&blorp_batch);
    iris_flush_and_dirty_for_history(ice, batch, res, 0,
@@ -612,6 +615,11 @@ clear_depth_stencil(struct iris_context *ice,
       iris_resource_finish_depth(ice, z_res, level,
                                  box->z, box->depth, true);
    }
+
+   if (stencil_mask) {
+      iris_resource_finish_write(ice, stencil_res, level, box->z, box->depth,
+                                 stencil_res->aux.usage);
+   }
 }
 
 /**