From: Kyungmin Park <kyungmin.park@samsung.com>
Date: Tue, 29 Sep 2009 00:59:16 +0000 (+0900)
Subject: s5pc110: aquila: Can configure EPLL 50MHz
X-Git-Tag: IL01-20091009~24
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=811af542d438807c04b1b21a6e0fb1c3eb2113af;p=kernel%2Fu-boot.git

s5pc110: aquila: Can configure EPLL 50MHz

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---

diff --git a/board/samsung/universal/lowlevel_init.S b/board/samsung/universal/lowlevel_init.S
index 6535492..1179e45 100644
--- a/board/samsung/universal/lowlevel_init.S
+++ b/board/samsung/universal/lowlevel_init.S
@@ -333,7 +333,11 @@ system_clock_init:
 	ldr	r1, =0x829B0C01			@ 667MHz
 	str	r1, [r0, #0x108]
 	/* S5PC110_EPLL_CON */
-	ldr	r1, =0x80600602			@  96MHz
+#ifdef CONFIG_EPLL_50MHZ
+	ldr	r1, =0x80640603			@  50MHz VSEL 0 P 6 M 100 S 3
+#else
+	ldr	r1, =0x80600602			@  96MHz VSEL 0 P 6 M 96 S 2
+#endif
 	str	r1, [r0, #0x110]
 	/* S5PC110_VPLL_CON */
 	ldr	r1, =0x806C0603			@  54MHz
@@ -353,9 +357,18 @@ system_clock_init:
 	 * XCLKOUT = (FOUTAPLL/4) / (DIVVAL + 1)
 	 *         = (800 MHz/ 4) / (9 + 1)
 	 *         = 20 MHz
+	 *
+	 * XCLKOUT = (FOUTEPLL) / (DIVVAL + 1)
+	 *         = (50 MHz) / (1 + 1)
+	 *         = 25 MHz
 	 */
+#ifdef CONFIG_EPLL_50MHZ
+	ldr	r1, =0x00102000			@ DIVVAL[23:20] = 1
+						@ CLKSEL[16:12] = 2 FOUTEPLL
+#else
 	ldr	r1, =0x00900000			@ DIVVAL[23:20] = 9
 						@ CLKSEL[16:12] = 0 FOUTAPLL/4
+#endif
 	str	r1, [r0, #0x500]		@ S5PC110_CLK_OUT
 
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