From: Noah Goldstein Date: Thu, 25 May 2023 17:10:31 +0000 (-0500) Subject: [KnownBits] Return `0` for poison {s,u}div inputs X-Git-Tag: upstream/17.0.6~5939 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=809b1d834dfc59575be228cfbccb95b10c2c34e2;p=platform%2Fupstream%2Fllvm.git [KnownBits] Return `0` for poison {s,u}div inputs It seems consistent to always return zero for known poison rather than varying the value. We do the same elsewhere. Differential Revision: https://reviews.llvm.org/D150922 --- diff --git a/llvm/lib/Support/KnownBits.cpp b/llvm/lib/Support/KnownBits.cpp index 8bc65628e3a2..ce2813e2fb3a 100644 --- a/llvm/lib/Support/KnownBits.cpp +++ b/llvm/lib/Support/KnownBits.cpp @@ -758,6 +758,13 @@ KnownBits KnownBits::sdiv(const KnownBits &LHS, const KnownBits &RHS, assert(!LHS.hasConflict() && !RHS.hasConflict() && "Bad inputs"); KnownBits Known(BitWidth); + if (LHS.isZero() || RHS.isZero()) { + // Result is either known Zero or UB. Return Zero either way. + // Checking this earlier saves us a lot of special cases later on. + Known.setAllZero(); + return Known; + } + std::optional Res; if (LHS.isNegative() && RHS.isNegative()) { // Result non-negative. @@ -819,6 +826,13 @@ KnownBits KnownBits::udiv(const KnownBits &LHS, const KnownBits &RHS, assert(!LHS.hasConflict() && !RHS.hasConflict()); KnownBits Known(BitWidth); + if (LHS.isZero() || RHS.isZero()) { + // Result is either known Zero or UB. Return Zero either way. + // Checking this earlier saves us a lot of special cases later on. + Known.setAllZero(); + return Known; + } + // We can figure out the minimum number of upper zero bits by doing // MaxNumerator / MinDenominator. If the Numerator gets smaller or Denominator // gets larger, the number of upper zero bits increases. diff --git a/llvm/test/CodeGen/WebAssembly/pr59626.ll b/llvm/test/CodeGen/WebAssembly/pr59626.ll index a0c4ba7d6759..39941dd1024a 100644 --- a/llvm/test/CodeGen/WebAssembly/pr59626.ll +++ b/llvm/test/CodeGen/WebAssembly/pr59626.ll @@ -13,6 +13,9 @@ define i8 @f(ptr %0, ptr %1) { ; CHECK-32-NEXT: i32.const 0 ; CHECK-32-NEXT: i32.store16 0 ; CHECK-32-NEXT: local.get 1 +; CHECK-32-NEXT: i32.const 0 +; CHECK-32-NEXT: i32.store8 2 +; CHECK-32-NEXT: local.get 1 ; CHECK-32-NEXT: local.get 0 ; CHECK-32-NEXT: i8x16.splat ; CHECK-32-NEXT: v128.store16_lane 0, 0