From: Sanjay Patel Date: Sun, 21 Aug 2016 16:35:34 +0000 (+0000) Subject: [InstCombine] use m_APInt to allow icmp (shl X, Y), C folds for splat constant vector... X-Git-Tag: llvmorg-4.0.0-rc1~11798 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=7ffcde7422ae7b766a5534ba4ad63d8a67bef651;p=platform%2Fupstream%2Fllvm.git [InstCombine] use m_APInt to allow icmp (shl X, Y), C folds for splat constant vectors, part 3 This is a partial enablement (move the ConstantInt guard down). llvm-svn: 279399 --- diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp index 73dc141..b36eadf 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp @@ -2030,15 +2030,10 @@ Instruction *InstCombiner::foldICmpShlConstant(ICmpInst &Cmp, Instruction *Shl, if (cast(Shl)->hasNoSignedWrap() && isSignTest(Pred, *C)) return new ICmpInst(Pred, X, Constant::getNullValue(X->getType())); - // FIXME: This check restricts all folds under here to scalar types. - ConstantInt *RHS = dyn_cast(Cmp.getOperand(1)); - if (!RHS) - return nullptr; - // Otherwise, if this is a comparison of the sign bit, simplify to and/test. bool TrueIfSigned = false; if (Shl->hasOneUse() && isSignBitCheck(Pred, *C, TrueIfSigned)) { - // (X << 31) (X&1) != 0 + // (X << 31) (X & 1) != 0 Constant *Mask = ConstantInt::get( X->getType(), APInt::getOneBitSet(TypeBits, TypeBits - ShiftAmt->getZExtValue() - 1)); @@ -2047,6 +2042,11 @@ Instruction *InstCombiner::foldICmpShlConstant(ICmpInst &Cmp, Instruction *Shl, And, Constant::getNullValue(And->getType())); } + // FIXME: This check restricts all folds under here to scalar types. + ConstantInt *RHS = dyn_cast(Cmp.getOperand(1)); + if (!RHS) + return nullptr; + // Transform (icmp pred iM (shl iM %v, N), CI) // -> (icmp pred i(M-N) (trunc %v iM to i(M-N)), (trunc (CI>>N)) // Transform the shl to a trunc if (trunc (CI>>N)) has no loss and M-N. diff --git a/llvm/test/Transforms/InstCombine/shift.ll b/llvm/test/Transforms/InstCombine/shift.ll index d5a0062..c394577 100644 --- a/llvm/test/Transforms/InstCombine/shift.ll +++ b/llvm/test/Transforms/InstCombine/shift.ll @@ -608,8 +608,8 @@ define i1 @test33(i32 %X) { ; FIXME: Vectors should fold the same way. define <2 x i1> @test33vec(<2 x i32> %X) { ; CHECK-LABEL: @test33vec( -; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i32> %X, -; CHECK-NEXT: [[TMP2:%.*]] = icmp slt <2 x i32> [[TMP1]], zeroinitializer +; CHECK-NEXT: [[TMP1_MASK:%.*]] = and <2 x i32> %X, +; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <2 x i32> [[TMP1_MASK]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[TMP2]] ; %tmp1 = shl <2 x i32> %X,