From: Conor Dooley Date: Sat, 16 Sep 2023 09:14:00 +0000 (+0100) Subject: riscv: dts: allwinner: remove address-cells from intc node X-Git-Tag: v6.6.17~3350 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=7f3650a0b6615f230d798f11c18ff032172a4045;p=platform%2Fkernel%2Flinux-rpi.git riscv: dts: allwinner: remove address-cells from intc node [ Upstream commit 267860b10c67dd396c73a9e6e8103670d78a4c01 ] A recent submission [1] from Rob has added additionalProperties: false to the interrupt-controller child node of RISC-V cpus, highlighting that the D1 DT has been incorrectly using #address-cells since its introduction. It has no child nodes, so #address-cells is not needed. Remove it. Fixes: 077e5f4f5528 ("riscv: dts: allwinner: Add the D1/D1s SoC devicetree") Link: https://patchwork.kernel.org/project/linux-riscv/patch/20230915201946.4184468-1-robh@kernel.org/ [1] Signed-off-by: Conor Dooley Acked-by: Jernej Skrabec Link: https://lore.kernel.org/r/20230916-saddling-dastardly-8cf6d1263c24@spud Signed-off-by: Jernej Skrabec Signed-off-by: Sasha Levin --- diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi index 8275630..b868431 100644 --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi @@ -30,7 +30,6 @@ cpu0_intc: interrupt-controller { compatible = "riscv,cpu-intc"; interrupt-controller; - #address-cells = <0>; #interrupt-cells = <1>; }; };