From: Ashish Kumar <Ashish.Kumar@nxp.com>
Date: Wed, 18 Apr 2018 05:07:24 +0000 (+0530)
Subject: armv8: ls1088: Update 1900MT/s DDR timing to bring consistency
X-Git-Tag: v2018.07-rc1~160^2~6
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=7d3a532d5dd90841ca747a98158b334f4eeb42ef;p=platform%2Fkernel%2Fu-boot.git

armv8: ls1088: Update 1900MT/s DDR timing to bring consistency

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---

diff --git a/board/freescale/ls1088a/ddr.h b/board/freescale/ls1088a/ddr.h
index 764ed79..b35c4ae 100644
--- a/board/freescale/ls1088a/ddr.h
+++ b/board/freescale/ls1088a/ddr.h
@@ -30,12 +30,12 @@ static const struct board_specific_parameters udimm0[] = {
 #if defined(CONFIG_TARGET_LS1088ARDB)
 
 	{2,  1666, 0, 8,     8, 0x090A0B0E, 0x0F10110D,},
-	{2,  1900, 0, 4,     7, 0x09090B0D, 0x0E10120B,},
+	{2,  1900, 0, 8,     9, 0x0A0B0C10, 0x1112140E,},
 	{2,  2300, 0, 8,     9, 0x0A0C0E11, 0x1214160F,},
 	{}
 #elif defined(CONFIG_TARGET_LS1088AQDS)
 	{2,  1666, 0, 8,     8, 0x0A0A0C0E, 0x0F10110C,},
-	{2,  1900, 0, 4,     7, 0x09090B0D, 0x0E10120B,},
+	{2,  1900, 0, 8,     9, 0x0A0B0C10, 0x1112140E,},
 	{2,  2300, 0, 4,     9, 0x0A0C0D11, 0x1214150E,},
 	{}