From: edgar_igl <edgar_igl@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Mon, 27 Oct 2008 21:10:26 +0000 (+0000)
Subject: CRIS: Plug a few temp leaks.
X-Git-Tag: TizenStudio_2.0_p2.3~10672
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=7cddbad8029b0a3c23d50866cd94332aa85a7ea3;p=sdk%2Femulator%2Fqemu.git

CRIS: Plug a few temp leaks.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5554 c046a42c-6fe2-441c-8c8c-71466251a162
---

diff --git a/target-cris/translate.c b/target-cris/translate.c
index 7423a6a..6f71e19 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -1928,6 +1928,7 @@ static unsigned int dec_swap_r(DisasContext *dc)
 		t_gen_swapr(t0, t0);
 	cris_alu(dc, CC_OP_MOVE,
 		    cpu_R[dc->op1], cpu_R[dc->op1], t0, 4);
+	tcg_temp_free(t0);
 	return 2;
 }
 
@@ -1954,6 +1955,7 @@ static unsigned int dec_addi_r(DisasContext *dc)
 	t0 = tcg_temp_new(TCG_TYPE_TL);
 	tcg_gen_shl_tl(t0, cpu_R[dc->op2], tcg_const_tl(dc->zzsize));
 	tcg_gen_add_tl(cpu_R[dc->op1], cpu_R[dc->op1], t0);
+	tcg_temp_free(t0);
 	return 2;
 }
 
@@ -1966,7 +1968,7 @@ static unsigned int dec_addi_acr(DisasContext *dc)
 	t0 = tcg_temp_new(TCG_TYPE_TL);
 	tcg_gen_shl_tl(t0, cpu_R[dc->op2], tcg_const_tl(dc->zzsize));
 	tcg_gen_add_tl(cpu_R[R_ACR], cpu_R[dc->op1], t0);
-
+	tcg_temp_free(t0);
 	return 2;
 }