From: Seung-Woo Kim Date: Tue, 17 Dec 2019 03:50:05 +0000 (+0900) Subject: soc: samsung: pwrcal: fix not to calculate array size from null X-Git-Tag: submit/tizen/20191230.065651~9 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=7b94b00b435d1505c00407c5996aa4d0d72d0630;p=profile%2Fwearable%2Fplatform%2Fkernel%2Flinux-3.18-exynos7270.git soc: samsung: pwrcal: fix not to calculate array size from null Calculating array size from null causes sizeof-pointer-div warning. Fix not to calculate array size from null by adding pll macro without table. Change-Id: I0b403f7c8ec15f8fdcd928d683fd61b50b8eda28 Signed-off-by: Seung-Woo Kim --- diff --git a/drivers/soc/samsung/pwrcal/S5E7570/S5E7570-cmu.c b/drivers/soc/samsung/pwrcal/S5E7570/S5E7570-cmu.c index 21c829941ae..ec70f9bf608 100644 --- a/drivers/soc/samsung/pwrcal/S5E7570/S5E7570-cmu.c +++ b/drivers/soc/samsung/pwrcal/S5E7570/S5E7570-cmu.c @@ -37,12 +37,12 @@ extern struct pwrcal_pll_ops pll141xx_ops; extern struct pwrcal_pll_ops pll1431x_ops; extern struct pwrcal_pll_ops wpll_usbpll_ops; -CLK_PLL(14170, CPUCL0_PLL, 0, CPUCL0_PLL_LOCK, CPUCL0_PLL_CON0, NULL, CPUCL0_MUX_CPUCL0_PLL, &pll141xx_ops); -CLK_PLL(14170, SHARED0_PLL, 0, SHARED0_PLL_LOCK, SHARED0_PLL_CON0, NULL, MIF_MUX_SHARED0_PLL, &pll141xx_ops); -CLK_PLL(14170, SHARED1_PLL, 0, SHARED1_PLL_LOCK, SHARED1_PLL_CON0, NULL, MIF_MUX_SHARED1_PLL, &pll141xx_ops); -CLK_PLL(14170, SHARED2_PLL, 0, SHARED2_PLL_LOCK, SHARED2_PLL_CON0, NULL, MIF_MUX_SHARED2_PLL, &pll141xx_ops); -CLK_PLL(14310, AUD_PLL, 0, AUD_PLL_LOCK, AUD_PLL_CON0, NULL, DISPAUD_MUX_AUD_PLL, &pll1431x_ops); -CLK_PLL(0, WPLL_USB_PLL, 0, USBPLL_CON0, USBPLL_CON1, NULL, 0, &wpll_usbpll_ops); +CLK_PLL_NO_TABLE(14170, CPUCL0_PLL, 0, CPUCL0_PLL_LOCK, CPUCL0_PLL_CON0, CPUCL0_MUX_CPUCL0_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14170, SHARED0_PLL, 0, SHARED0_PLL_LOCK, SHARED0_PLL_CON0, MIF_MUX_SHARED0_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14170, SHARED1_PLL, 0, SHARED1_PLL_LOCK, SHARED1_PLL_CON0, MIF_MUX_SHARED1_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14170, SHARED2_PLL, 0, SHARED2_PLL_LOCK, SHARED2_PLL_CON0, MIF_MUX_SHARED2_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14310, AUD_PLL, 0, AUD_PLL_LOCK, AUD_PLL_CON0, DISPAUD_MUX_AUD_PLL, &pll1431x_ops); +CLK_PLL_NO_TABLE(0, WPLL_USB_PLL, 0, USBPLL_CON0, USBPLL_CON1, 0, &wpll_usbpll_ops); FIXEDRATE(OSCCLK, 26 * MHZ, 0); FIXEDRATE(OSCCLK_FM_52M, 26 * MHZ, 0); diff --git a/drivers/soc/samsung/pwrcal/S5E7870/S5E7870-cmu.c b/drivers/soc/samsung/pwrcal/S5E7870/S5E7870-cmu.c index 6fa86506f34..f3c32bc84bd 100644 --- a/drivers/soc/samsung/pwrcal/S5E7870/S5E7870-cmu.c +++ b/drivers/soc/samsung/pwrcal/S5E7870/S5E7870-cmu.c @@ -42,16 +42,16 @@ struct pwrcal_clk *gate_type_list[NUM_OF_GATE_TYPE]; #define ADD_CLK_TO_LIST(to, x) to[clk_##x.clk.id & 0xFFF] = &(clk_##x.clk) -CLK_PLL(14170, CPUCL0_PLL, 0, CPUCL0_PLL_LOCK, CPUCL0_PLL_CON0, NULL, CPUCL0_MUX_CPUCL0_PLL, &pll141xx_ops); -CLK_PLL(14170, CPUCL1_PLL, 0, CPUCL1_PLL_LOCK, CPUCL1_PLL_CON0, NULL, CPUCL1_MUX_CPUCL1_PLL, &pll141xx_ops); -CLK_PLL(14170, MEM_PLL, 0, MEM_PLL_LOCK, MEM_PLL_CON0, NULL, MIF_MUX_MEM_PLL, &pll141xx_ops); -CLK_PLL(14170, BUS_PLL, 0, BUS_PLL_LOCK, BUS_PLL_CON0, NULL, MIF_MUX_BUS_PLL, &pll141xx_ops); -CLK_PLL(14170, MEDIA_PLL, 0, MEDIA_PLL_LOCK, MEDIA_PLL_CON0, NULL, MIF_MUX_MEDIA_PLL, &pll141xx_ops); -CLK_PLL(14180, G3D_PLL, 0, G3D_PLL_LOCK, G3D_PLL_CON0, NULL, G3D_MUX_G3D_PLL, &pll141xx_ops); -CLK_PLL(14180, USB_PLL, 0, USB_PLL_LOCK, USB_PLL_CON0, NULL, FSYS_MUX_USB_PLL, &pll141xx_ops); -CLK_PLL(14180, ISP_PLL, 0, ISP_PLL_LOCK, ISP_PLL_CON0, NULL, ISP_MUX_ISP_PLL, &pll141xx_ops); -CLK_PLL(14180, DISP_PLL, 0, DISP_PLL_LOCK, DISP_PLL_CON0, NULL, DISPAUD_MUX_DISP_PLL, &pll141xx_ops); -CLK_PLL(14310, AUD_PLL, 0, AUD_PLL_LOCK, AUD_PLL_CON0, NULL, DISPAUD_MUX_AUD_PLL, &pll1431x_ops); +CLK_PLL_NO_TABLE(14170, CPUCL0_PLL, 0, CPUCL0_PLL_LOCK, CPUCL0_PLL_CON0, CPUCL0_MUX_CPUCL0_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14170, CPUCL1_PLL, 0, CPUCL1_PLL_LOCK, CPUCL1_PLL_CON0, CPUCL1_MUX_CPUCL1_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14170, MEM_PLL, 0, MEM_PLL_LOCK, MEM_PLL_CON0, MIF_MUX_MEM_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14170, BUS_PLL, 0, BUS_PLL_LOCK, BUS_PLL_CON0, MIF_MUX_BUS_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14170, MEDIA_PLL, 0, MEDIA_PLL_LOCK, MEDIA_PLL_CON0, MIF_MUX_MEDIA_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14180, G3D_PLL, 0, G3D_PLL_LOCK, G3D_PLL_CON0, G3D_MUX_G3D_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14180, USB_PLL, 0, USB_PLL_LOCK, USB_PLL_CON0, FSYS_MUX_USB_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14180, ISP_PLL, 0, ISP_PLL_LOCK, ISP_PLL_CON0, ISP_MUX_ISP_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14180, DISP_PLL, 0, DISP_PLL_LOCK, DISP_PLL_CON0, DISPAUD_MUX_DISP_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14310, AUD_PLL, 0, AUD_PLL_LOCK, AUD_PLL_CON0, DISPAUD_MUX_AUD_PLL, &pll1431x_ops); FIXEDRATE(OSCCLK, 26 * MHZ, 0); diff --git a/drivers/soc/samsung/pwrcal/S5E8890/S5E8890-cmu.c b/drivers/soc/samsung/pwrcal/S5E8890/S5E8890-cmu.c index 210d4961b90..0348d70b088 100644 --- a/drivers/soc/samsung/pwrcal/S5E8890/S5E8890-cmu.c +++ b/drivers/soc/samsung/pwrcal/S5E8890/S5E8890-cmu.c @@ -26,19 +26,19 @@ struct pwrcal_clk *gate_type_list[NUM_OF_GATE_TYPE]; #define ADD_CLK_TO_LIST(to, x) to[clk_##x.clk.id & 0xFFF] = &(clk_##x.clk) -CLK_PLL(14160, MNGS_PLL, 0, MNGS_PLL_LOCK, MNGS_PLL_CON0, NULL, MNGS_MUX_MNGS_PLL, &pll141xx_ops); -CLK_PLL(14170, APOLLO_PLL, 0, APOLLO_PLL_LOCK, APOLLO_PLL_CON0, NULL, APOLLO_MUX_APOLLO_PLL, &pll141xx_ops); -CLK_PLL(14180, G3D_PLL, 0, G3D_PLL_LOCK, G3D_PLL_CON0, NULL, G3D_MUX_G3D_PLL_USER, &pll141xx_ops); -CLK_PLL(14190, MIF_PLL, 0, MIF0_PLL_LOCK, MIF_CLK_CTRL0, NULL, TOP_MUX_MIF_PLL, &pll1419x_ops); -CLK_PLL(14180, BUS0_PLL, 0, BUS0_PLL_LOCK, BUS0_PLL_CON0, NULL, TOP_MUX_BUS0_PLL, &pll141xx_ops); -CLK_PLL(14180, BUS1_PLL, 0, BUS1_PLL_LOCK, BUS1_PLL_CON0, NULL, TOP_MUX_BUS1_PLL, &pll141xx_ops); -CLK_PLL(14180, BUS2_PLL, 0, BUS2_PLL_LOCK, BUS2_PLL_CON0, NULL, TOP_MUX_BUS2_PLL, &pll141xx_ops); -CLK_PLL(14170, BUS3_PLL, 0, BUS3_PLL_LOCK, BUS3_PLL_CON0, NULL, TOP_MUX_BUS3_PLL, &pll141xx_ops); -CLK_PLL(14180, MFC_PLL, 0, MFC_PLL_LOCK, MFC_PLL_CON0, NULL, TOP_MUX_MFC_PLL, &pll141xx_ops); -CLK_PLL(14180, ISP_PLL, 0, ISP_PLL_LOCK, ISP_PLL_CON0, NULL, TOP_MUX_ISP_PLL, &pll141xx_ops); -CLK_PLL(14180, DISP_PLL, 0, DISP_PLL_LOCK, DISP_PLL_CON0, NULL, DISP0_MUX_DISP_PLL, &pll141xx_ops); -CLK_PLL(14310, AUD_PLL, 0, AUD_PLL_LOCK, AUD_PLL_CON0, NULL, AUD_MUX_AUD_PLL_USER, &pll1431x_ops); -CLK_PLL(14310, PCIE_PLL, 0, PCIE_PLL_LOCK, PCIE_PLL_CON0, NULL, FSYS1_MUX_PCIE_PLL, &pll1431x_ops); +CLK_PLL_NO_TABLE(14160, MNGS_PLL, 0, MNGS_PLL_LOCK, MNGS_PLL_CON0, MNGS_MUX_MNGS_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14170, APOLLO_PLL, 0, APOLLO_PLL_LOCK, APOLLO_PLL_CON0, APOLLO_MUX_APOLLO_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14180, G3D_PLL, 0, G3D_PLL_LOCK, G3D_PLL_CON0, G3D_MUX_G3D_PLL_USER, &pll141xx_ops); +CLK_PLL_NO_TABLE(14190, MIF_PLL, 0, MIF0_PLL_LOCK, MIF_CLK_CTRL0, TOP_MUX_MIF_PLL, &pll1419x_ops); +CLK_PLL_NO_TABLE(14180, BUS0_PLL, 0, BUS0_PLL_LOCK, BUS0_PLL_CON0, TOP_MUX_BUS0_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14180, BUS1_PLL, 0, BUS1_PLL_LOCK, BUS1_PLL_CON0, TOP_MUX_BUS1_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14180, BUS2_PLL, 0, BUS2_PLL_LOCK, BUS2_PLL_CON0, TOP_MUX_BUS2_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14170, BUS3_PLL, 0, BUS3_PLL_LOCK, BUS3_PLL_CON0, TOP_MUX_BUS3_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14180, MFC_PLL, 0, MFC_PLL_LOCK, MFC_PLL_CON0, TOP_MUX_MFC_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14180, ISP_PLL, 0, ISP_PLL_LOCK, ISP_PLL_CON0, TOP_MUX_ISP_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14180, DISP_PLL, 0, DISP_PLL_LOCK, DISP_PLL_CON0, DISP0_MUX_DISP_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14310, AUD_PLL, 0, AUD_PLL_LOCK, AUD_PLL_CON0, AUD_MUX_AUD_PLL_USER, &pll1431x_ops); +CLK_PLL_NO_TABLE(14310, PCIE_PLL, 0, PCIE_PLL_LOCK, PCIE_PLL_CON0, FSYS1_MUX_PCIE_PLL, &pll1431x_ops); FIXEDRATE(OSCCLK, 26 * MHZ, 0); FIXEDRATE(OSCCLK_26M, 26 * MHZ, 0); diff --git a/drivers/soc/samsung/pwrcal/S5E8890_EVT0/S5E8890-cmu.c b/drivers/soc/samsung/pwrcal/S5E8890_EVT0/S5E8890-cmu.c index 175bfa51ce3..0e99b4aefc9 100644 --- a/drivers/soc/samsung/pwrcal/S5E8890_EVT0/S5E8890-cmu.c +++ b/drivers/soc/samsung/pwrcal/S5E8890_EVT0/S5E8890-cmu.c @@ -22,18 +22,18 @@ struct pwrcal_clk *gate_type_list[NUM_OF_GATE_TYPE]; #define ADD_CLK_TO_LIST(to, x) to[clk_##x.clk.id & 0xFFFF] = &(clk_##x.clk) -CLK_PLL(14160, MNGS_PLL, 0, MNGS_PLL_LOCK, MNGS_PLL_CON0, NULL, MNGS_MUX_MNGS_PLL, &pll141xx_ops); -CLK_PLL(14170, APOLLO_PLL, 0, APOLLO_PLL_LOCK, APOLLO_PLL_CON0, NULL, APOLLO_MUX_APOLLO_PLL, &pll141xx_ops); -CLK_PLL(14180, G3D_PLL, 0, G3D_PLL_LOCK, G3D_PLL_CON0, NULL, G3D_MUX_G3D_PLL_USER, &pll141xx_ops); -CLK_PLL(14190, MIF_PLL, 0, MIF0_PLL_LOCK, MIF_CLK_CTRL0, NULL, TOP_MUX_MIF_PLL, &pll1419x_ops); -CLK_PLL(14180, BUS0_PLL, 0, BUS0_PLL_LOCK, BUS0_PLL_CON0, NULL, TOP_MUX_BUS0_PLL, &pll141xx_ops); -CLK_PLL(14180, BUS1_PLL, 0, BUS1_PLL_LOCK, BUS1_PLL_CON0, NULL, TOP_MUX_BUS1_PLL, &pll141xx_ops); -CLK_PLL(14180, BUS2_PLL, 0, BUS2_PLL_LOCK, BUS2_PLL_CON0, NULL, TOP_MUX_BUS2_PLL, &pll141xx_ops); -CLK_PLL(14170, BUS3_PLL, 0, BUS3_PLL_LOCK, BUS3_PLL_CON0, NULL, TOP_MUX_BUS3_PLL, &pll141xx_ops); -CLK_PLL(14180, MFC_PLL, 0, MFC_PLL_LOCK, MFC_PLL_CON0, NULL, TOP_MUX_MFC_PLL, &pll141xx_ops); -CLK_PLL(14180, ISP_PLL, 0, ISP_PLL_LOCK, ISP_PLL_CON0, NULL, TOP_MUX_ISP_PLL, &pll141xx_ops); -CLK_PLL(14180, DISP_PLL, 0, DISP_PLL_LOCK, DISP_PLL_CON0, NULL, DISP0_MUX_DISP_PLL, &pll141xx_ops); -CLK_PLL(14310, AUD_PLL, 0, AUD_PLL_LOCK, AUD_PLL_CON0, NULL, AUD_MUX_AUD_PLL_USER, &pll1431x_ops); +CLK_PLL_NO_TABLE(14160, MNGS_PLL, 0, MNGS_PLL_LOCK, MNGS_PLL_CON0, MNGS_MUX_MNGS_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14170, APOLLO_PLL, 0, APOLLO_PLL_LOCK, APOLLO_PLL_CON0, APOLLO_MUX_APOLLO_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14180, G3D_PLL, 0, G3D_PLL_LOCK, G3D_PLL_CON0,, G3D_MUX_G3D_PLL_USER, &pll141xx_ops); +CLK_PLL_NO_TABLE(14190, MIF_PLL, 0, MIF0_PLL_LOCK, MIF_CLK_CTRL0, TOP_MUX_MIF_PLL, &pll1419x_ops); +CLK_PLL_NO_TABLE(14180, BUS0_PLL, 0, BUS0_PLL_LOCK, BUS0_PLL_CON0, TOP_MUX_BUS0_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14180, BUS1_PLL, 0, BUS1_PLL_LOCK, BUS1_PLL_CON0, TOP_MUX_BUS1_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14180, BUS2_PLL, 0, BUS2_PLL_LOCK, BUS2_PLL_CON0, TOP_MUX_BUS2_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14170, BUS3_PLL, 0, BUS3_PLL_LOCK, BUS3_PLL_CON0, TOP_MUX_BUS3_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14180, MFC_PLL, 0, MFC_PLL_LOCK, MFC_PLL_CON0, TOP_MUX_MFC_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14180, ISP_PLL, 0, ISP_PLL_LOCK, ISP_PLL_CON0, TOP_MUX_ISP_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14180, DISP_PLL, 0, DISP_PLL_LOCK, DISP_PLL_CON0, DISP0_MUX_DISP_PLL, &pll141xx_ops); +CLK_PLL_NO_TABLE(14310, AUD_PLL, 0, AUD_PLL_LOCK, AUD_PLL_CON0, AUD_MUX_AUD_PLL_USER, &pll1431x_ops); FIXEDRATE(OSCCLK, 26 * MHZ, 0); FIXEDRATE(OSCCLK_26M, 26 * MHZ, 0); diff --git a/drivers/soc/samsung/pwrcal/pwrcal-clk.h b/drivers/soc/samsung/pwrcal/pwrcal-clk.h index 7cbcb6ab296..d38d938da19 100644 --- a/drivers/soc/samsung/pwrcal/pwrcal-clk.h +++ b/drivers/soc/samsung/pwrcal/pwrcal-clk.h @@ -130,6 +130,17 @@ struct pwrcal_pll clk_##_id __attribute__((unused, aligned(8), section(".clk_pll .ops = _ops \ } +#define CLK_PLL_NO_TABLE(_typ, _id, _pid, _lock, _con, _mux, _ops) \ +struct pwrcal_pll clk_##_id __attribute__((unused, aligned(8), section(".clk_pll."))) = { \ + .clk.id = _id, \ + .clk.parent = &((clk_##_pid).clk), \ + .clk.offset = _con, \ + .clk.status = _lock, \ + .clk.name = #_id, \ + .type = _typ, \ + .mux = &((clk_##_mux).clk), \ + .ops = _ops \ +} extern struct pwrcal_clk_ops frate_ops; struct pwrcal_clk_fixed_rate {