From: Roland Dreier <roland@purestorage.com>
Date: Tue, 14 Oct 2014 21:09:12 +0000 (-0700)
Subject: Merge branches 'core', 'cxgb4', 'iser', 'mlx5' and 'ocrdma' into for-next
X-Git-Tag: v3.18-rc1~7^2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=7b909bb49ac204bfd2e628707db37beb490dbc5c;p=profile%2Fcommon%2Fplatform%2Fkernel%2Flinux-artik7.git

Merge branches 'core', 'cxgb4', 'iser', 'mlx5' and 'ocrdma' into for-next
---

7b909bb49ac204bfd2e628707db37beb490dbc5c
diff --cc drivers/infiniband/hw/mlx5/qp.c
index 8c574b6,8c574b6,d7f35e9e,34b92fc,8c574b6..f1b49e0
--- a/drivers/infiniband/hw/mlx5/qp.c
+++ b/drivers/infiniband/hw/mlx5/qp.c
@@@@@@ -2020,56 -2020,56 -2020,31 -2009,56 -2020,56 +2009,31 @@@@@@ static u8 bs_selector(int block_size
     	}
     }
     
-- --static int format_selector(struct ib_sig_attrs *attr,
-- --			   struct ib_sig_domain *domain,
-- --			   int *selector)
   - {
   - 
   - #define FORMAT_DIF_NONE		0
   - #define FORMAT_DIF_CRC_INC	8
   - #define FORMAT_DIF_CRC_NO_INC	12
   - #define FORMAT_DIF_CSUM_INC	13
   - #define FORMAT_DIF_CSUM_NO_INC	14
   - 
   - 	switch (domain->sig.dif.type) {
   - 	case IB_T10DIF_NONE:
   - 		/* No DIF */
   - 		*selector = FORMAT_DIF_NONE;
   - 		break;
   - 	case IB_T10DIF_TYPE1: /* Fall through */
   - 	case IB_T10DIF_TYPE2:
   - 		switch (domain->sig.dif.bg_type) {
   - 		case IB_T10DIF_CRC:
   - 			*selector = FORMAT_DIF_CRC_INC;
   - 			break;
   - 		case IB_T10DIF_CSUM:
   - 			*selector = FORMAT_DIF_CSUM_INC;
   - 			break;
   - 		default:
   - 			return 1;
   - 		}
   - 		break;
   - 	case IB_T10DIF_TYPE3:
   - 		switch (domain->sig.dif.bg_type) {
   - 		case IB_T10DIF_CRC:
   - 			*selector = domain->sig.dif.type3_inc_reftag ?
   - 					   FORMAT_DIF_CRC_INC :
   - 					   FORMAT_DIF_CRC_NO_INC;
   - 			break;
   - 		case IB_T10DIF_CSUM:
   - 			*selector = domain->sig.dif.type3_inc_reftag ?
   - 					   FORMAT_DIF_CSUM_INC :
   - 					   FORMAT_DIF_CSUM_NO_INC;
   - 			break;
   - 		default:
   - 			return 1;
   - 		}
   - 		break;
   - 	default:
   - 		return 1;
++ ++static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain,
++ ++			      struct mlx5_bsf_inl *inl)
   + {
++ ++	/* Valid inline section and allow BSF refresh */
++ ++	inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID |
++ ++				       MLX5_BSF_REFRESH_DIF);
++ ++	inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag);
++ ++	inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag);
++ ++	/* repeating block */
++ ++	inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK;
++ ++	inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ?
++ ++			MLX5_DIF_CRC : MLX5_DIF_IPCS;
   + 
--  -#define FORMAT_DIF_NONE		0
--  -#define FORMAT_DIF_CRC_INC	8
--  -#define FORMAT_DIF_CRC_NO_INC	12
--  -#define FORMAT_DIF_CSUM_INC	13
--  -#define FORMAT_DIF_CSUM_NO_INC	14
++ ++	if (domain->sig.dif.ref_remap)
++ ++		inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG;
   + 
--  -	switch (domain->sig.dif.type) {
--  -	case IB_T10DIF_NONE:
--  -		/* No DIF */
--  -		*selector = FORMAT_DIF_NONE;
--  -		break;
--  -	case IB_T10DIF_TYPE1: /* Fall through */
--  -	case IB_T10DIF_TYPE2:
--  -		switch (domain->sig.dif.bg_type) {
--  -		case IB_T10DIF_CRC:
--  -			*selector = FORMAT_DIF_CRC_INC;
--  -			break;
--  -		case IB_T10DIF_CSUM:
--  -			*selector = FORMAT_DIF_CSUM_INC;
--  -			break;
--  -		default:
--  -			return 1;
--  -		}
--  -		break;
--  -	case IB_T10DIF_TYPE3:
--  -		switch (domain->sig.dif.bg_type) {
--  -		case IB_T10DIF_CRC:
--  -			*selector = domain->sig.dif.type3_inc_reftag ?
--  -					   FORMAT_DIF_CRC_INC :
--  -					   FORMAT_DIF_CRC_NO_INC;
--  -			break;
--  -		case IB_T10DIF_CSUM:
--  -			*selector = domain->sig.dif.type3_inc_reftag ?
--  -					   FORMAT_DIF_CSUM_INC :
--  -					   FORMAT_DIF_CSUM_NO_INC;
--  -			break;
--  -		default:
--  -			return 1;
--  -		}
--  -		break;
--  -	default:
--  -		return 1;
++ ++	if (domain->sig.dif.app_escape) {
++ ++		if (domain->sig.dif.ref_escape)
++ ++			inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE;
++ ++		else
++ ++			inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE;
     	}
     
-- --	return 0;
++ ++	inl->dif_app_bitmask_check =
++ ++		cpu_to_be16(domain->sig.dif.apptag_check_mask);
     }
     
     static int mlx5_set_bsf(struct ib_mr *sig_mr,