From: Sanjay Patel <spatel@rotateright.com>
Date: Mon, 24 Oct 2016 15:43:40 +0000 (+0000)
Subject: [x86] regenerate checks
X-Git-Tag: llvmorg-4.0.0-rc1~6446
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=7b12e367406347ac22716b97198581a86dee7152;p=platform%2Fupstream%2Fllvm.git

[x86] regenerate checks

llvm-svn: 284982
---

diff --git a/llvm/test/CodeGen/X86/select_const.ll b/llvm/test/CodeGen/X86/select_const.ll
index a6c2377..2165b80 100644
--- a/llvm/test/CodeGen/X86/select_const.ll
+++ b/llvm/test/CodeGen/X86/select_const.ll
@@ -1,16 +1,17 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=corei7 | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
 
-define i64 @test1(i64 %x) nounwind {
-entry:
+define i64 @select_2_or_inc(i64 %x) {
+; CHECK-LABEL: select_2_or_inc:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    leaq 1(%rdi), %rax
+; CHECK-NEXT:    cmpq $2, %rdi
+; CHECK-NEXT:    cmoveq %rdi, %rax
+; CHECK-NEXT:    retq
+;
   %cmp = icmp eq i64 %x, 2
   %add = add i64 %x, 1
   %retval.0 = select i1 %cmp, i64 2, i64 %add
   ret i64 %retval.0
-
-; CHECK-LABEL: test1:
-; CHECK: leaq 1(%rdi), %rax
-; CHECK: cmpq $2, %rdi
-; CHECK: cmoveq %rdi, %rax
-; CHECK: ret
-
 }
+