From: Zi Xuan Wu Date: Tue, 2 Jul 2019 02:54:52 +0000 (+0000) Subject: [DAGCombiner] Exploiting more about the transformation of TransformFPLoadStorePair... X-Git-Tag: llvmorg-10-init~1506 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=7ae536a1cedfa6095ab3c14ad876e076b6b17e9b;p=platform%2Fupstream%2Fllvm.git [DAGCombiner] Exploiting more about the transformation of TransformFPLoadStorePair function For a given floating point load / store pair, if the load value isn't used by any other operations, then consider transforming the pair to integer load / store operations if the target deems the transformation profitable. And we can exploiting much more when there are other operation nodes with chain operand between the load/store pair so long as we keep the chain ordering original. We only replace the register used to load/store from float to integer. I only add testcase in ARM because the TLI.isDesirableToTransformToIntegerOp hook is only enabled in ARM target. Differential Revision: https://reviews.llvm.org/D60601 llvm-svn: 364883 --- diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 54a5269..2bfc397 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -14928,11 +14928,9 @@ SDValue DAGCombiner::ReduceLoadOpStoreWidth(SDNode *N) { /// load / store operations if the target deems the transformation profitable. SDValue DAGCombiner::TransformFPLoadStorePair(SDNode *N) { StoreSDNode *ST = cast(N); - SDValue Chain = ST->getChain(); SDValue Value = ST->getValue(); if (ISD::isNormalStore(ST) && ISD::isNormalLoad(Value.getNode()) && - Value.hasOneUse() && - Chain == SDValue(Value.getNode(), 1)) { + Value.hasOneUse()) { LoadSDNode *LD = cast(Value); EVT VT = LD->getMemoryVT(); if (!VT.isFloatingPoint() || @@ -14962,7 +14960,7 @@ SDValue DAGCombiner::TransformFPLoadStorePair(SDNode *N) { LD->getPointerInfo(), LDAlign); SDValue NewST = - DAG.getStore(NewLD.getValue(1), SDLoc(N), NewLD, ST->getBasePtr(), + DAG.getStore(ST->getChain(), SDLoc(N), NewLD, ST->getBasePtr(), ST->getPointerInfo(), STAlign); AddToWorklist(NewLD.getNode()); diff --git a/llvm/test/CodeGen/ARM/ldst-f32-2-i32.ll b/llvm/test/CodeGen/ARM/ldst-f32-2-i32.ll index 19227b0..2f83d96 100644 --- a/llvm/test/CodeGen/ARM/ldst-f32-2-i32.ll +++ b/llvm/test/CodeGen/ARM/ldst-f32-2-i32.ll @@ -36,3 +36,43 @@ bb: return: ret void } + +@a1 = local_unnamed_addr global float 0.000000e+00, align 4 +@a2 = local_unnamed_addr global float 0.000000e+00, align 4 +@a3 = local_unnamed_addr global float 0.000000e+00, align 4 +@a4 = local_unnamed_addr global float 0.000000e+00, align 4 +@a5 = local_unnamed_addr global float 0.000000e+00, align 4 +@a6 = local_unnamed_addr global float 0.000000e+00, align 4 +@a7 = local_unnamed_addr global float 0.000000e+00, align 4 +@a8 = local_unnamed_addr global float 0.000000e+00, align 4 + + +declare void @_Z3fooddddddddddddddd(float, float, float, float, float, float, float, float) + +; Because this test function is trying to pass float argument by stack, +; it can be optimized to i32 load / store +define signext i32 @test() { +%1 = load float, float* @a1, align 4 +%2 = load float, float* @a2, align 4 +%3 = load float, float* @a3, align 4 +%4 = load float, float* @a4, align 4 +%5 = load float, float* @a5, align 4 +%6 = load float, float* @a6, align 4 +%7 = load float, float* @a7, align 4 +%8 = load float, float* @a8, align 4 +tail call void @_Z3fooddddddddddddddd(float %1, float %2, float %3, float %4, float %5, float %6, float %7, float %8) +ret i32 0 +} + +; CHECK-LABEL: _test: +; CHECK: ldr r3, [pc, r3] +; CHECK: ldr r2, [pc, r2] +; CHECK: ldr r1, [pc, r1] +; CHECK: ldr r0, [pc, r0] +; CHECK: ldr r9, [pc, r9] +; CHECK: ldr r12, [pc, r12] +; CHECK: ldr lr, [pc, lr] +; CHECK: stm sp, {r9, r12, lr} +; CHECK: ldr r4, [pc, r4] +; CHECK: str r4, [sp, #12] +; CHECK: bl __Z3fooddddddddddddddd