From: Jaehoon Chung Date: Tue, 10 Oct 2017 02:50:01 +0000 (+0900) Subject: arm: exynos: clock: fix the compile warning about unused variable X-Git-Tag: submit/tizen_4.0/20171018.024233~2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=779be407608b712e05cad0935e1f6a97c818b26c;p=profile%2Fcommon%2Fplatform%2Fkernel%2Fu-boot-artik.git arm: exynos: clock: fix the compile warning about unused variable Some variables didn't used anywhere. Fix the compile warning about unused variable for artik5/10. Change-Id: I7a61e54b0a70b34f1ba12c0480773810d05bfa24 Signed-off-by: Jaehoon Chung --- diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 8c52e5284..30b34bbf6 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -228,7 +228,7 @@ static unsigned long exynos5260_get_pll_clk(int pllreg) (struct exynos5260_clock_kfc *)samsung_get_base_clock_kfc(); struct exynos5260_clock_mif *clk_mif = (struct exynos5260_clock_mif *)samsung_get_base_clock_mif(); - unsigned long r, m, p, s, k = 0, mask, fout; + unsigned long r, m, p, s, mask, fout; unsigned int pll_ratio = 0; unsigned int freq; @@ -292,7 +292,7 @@ static unsigned long exynos5430_get_pll_clk(int pllreg) struct exynos5430_clock_cpif *clk_cpif = (struct exynos5430_clock_cpif *) exynos5430_get_base_clock_cpif(); - unsigned long r, m, p, s, k = 0, mask, fout; + unsigned long r, m, p, s, mask, fout; unsigned int pll_ratio = 0; unsigned int bus_pll_sub_sel = 0; unsigned int freq; @@ -497,7 +497,6 @@ static unsigned long exynos5_get_pwm_clk(void) struct exynos5_clock *clk = (struct exynos5_clock *)samsung_get_base_clock(); unsigned long pclk, div_aclk_pre, div_aclk; - unsigned int ratio; /* * CLK_DIV_PERIC3 @@ -565,7 +564,9 @@ static unsigned long exynos4_get_uart_clk(int dev_index) unsigned long uclk, sclk; unsigned int sel; unsigned int ratio; +#ifdef CONFIG_CPU_EXYNOS3250 unsigned int mpll_ratio_pre; +#endif /* * CLK_SRC_PERIL0 @@ -1028,7 +1029,9 @@ static unsigned int exynos4_get_mmc_clk(int dev_index) unsigned int sel; unsigned int pre_ratio, ratio; unsigned long sclk; +#ifdef CONFIG_CPU_EXYNOS3250 unsigned int mpll_ratio_pre; +#endif sel = readl(&clk->src_fsys); sel = (sel >> (dev_index << 2)) & 0xf; @@ -1083,7 +1086,10 @@ static unsigned long exynos5_get_mmc_clk(int dev_index) (struct exynos5_clock *)samsung_get_base_clock(); unsigned int addr; unsigned int sel; - unsigned int pre_ratio, ratio; + unsigned int ratio; +#ifndef CONFIG_CPU_EXYNOS5420 + unsigned int pre_ratio; +#endif unsigned long sclk; sel = readl(&clk->src_fsys);