From: Jeff Law Date: Mon, 1 Jun 1998 23:04:50 +0000 (+0000) Subject: * gas/mips/break5900.d: Update after interlock changes. X-Git-Tag: gdb-4_18~2075 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=773cf1a24b6dce938698e6a497a895946322f630;p=platform%2Fupstream%2Fbinutils.git * gas/mips/break5900.d: Update after interlock changes. * gas/mips/mips.exp: The r5900 has ilocks and gpr_ilocks. * gas/mips/div-ilocks.d: Handle both "break" instruction variants. * gas/mips/{div.d, mul-ilocks.d, mul.d}: Likewise. --- diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 77d1bee..2b9b746 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,12 @@ +Mon Jun 1 17:00:22 1998 Jeffrey A Law (law@cygnus.com) + +start-sanitize-r5900 + * gas/mips/break5900.d: Update after interlock changes. + * gas/mips/mips.exp: The r5900 has ilocks and gpr_ilocks. +end-sanitize-r5900 + * gas/mips/div-ilocks.d: Handle both "break" instruction variants. + * gas/mips/{div.d, mul-ilocks.d, mul.d}: Likewise. + start-sanitize-sky Mon Jun 1 14:33:43 1998 Doug Evans diff --git a/gas/testsuite/gas/mips/break5900.d b/gas/testsuite/gas/mips/break5900.d new file mode 100644 index 0000000..523dc1a --- /dev/null +++ b/gas/testsuite/gas/mips/break5900.d @@ -0,0 +1,53 @@ +#as: -mcpu=r5900 +#objdump: -dr --prefix-addresses --show-raw-insn -mmips:5900 +#name: MIPS R5900 20-bit break + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*>.*0000000d.*break +0+0004 <[^>]*>.*0000000d.*break +0+0008 <[^>]*>.*0000050d.*break 0x14 +0+000c <[^>]*>.*00000a0d.*break 0x28 +0+0010 <[^>]*>.*0000ffcd.*break 0x3ff +0+0014 <[^>]*>.*03fffc0d.*break 0xffff0 +0+0018 <[^>]*>.*03ffffcd.*break 0xfffff +0+001c <[^>]*>.*0080202d.*move \$a0,\$a0 +0+0020 <[^>]*>.*00a0202d.*move \$a0,\$a1 +0+0024 <[^>]*>.*0085001b.*divu \$zero,\$a0,\$a1 +0+0028 <[^>]*>.*14a00002.*bnez \$a1,0+0034 <[^>]*> +0+002c <[^>]*>.*0085001b.*divu \$zero,\$a0,\$a1 +0+0030 <[^>]*>.*000001cd.*break 0x7 +0+0034 <[^>]*>.*00002012.*mflo \$a0 +0+0038 <[^>]*>.*0080202d.*move \$a0,\$a0 +0+003c <[^>]*>.*14c00002.*bnez \$a2,0+0048 <[^>]*> +0+0040 <[^>]*>.*00a6001a.*div \$zero,\$a1,\$a2 +0+0044 <[^>]*>.*000001cd.*break 0x7 +0+0048 <[^>]*>.*2401ffff.*li \$at,-1 +0+004c <[^>]*>.*14c10004.*bne \$a2,\$at,0+0060 <[^>]*> +0+0050 <[^>]*>.*3c018000.*lui \$at,0x8000 +0+0054 <[^>]*>.*14a10002.*bne \$a1,\$at,0+0060 <[^>]*> +0+0058 <[^>]*>.*00000000.*nop +0+005c <[^>]*>.*0000018d.*break 0x6 +0+0060 <[^>]*>.*00002010.*mfhi \$a0 +0+0064 <[^>]*>.*24010002.*li \$at,2 +0+0068 <[^>]*>.*00a1001b.*divu \$zero,\$a1,\$at +0+006c <[^>]*>.*00002010.*mfhi \$a0 +0+0070 <[^>]*>.*14c00002.*bnez \$a2,0+007c <[^>]*> +0+0074 <[^>]*>.*00a6001e.*ddiv \$zero,\$a1,\$a2 +0+0078 <[^>]*>.*000001cd.*break 0x7 +0+007c <[^>]*>.*6401ffff.*daddiu \$at,\$zero,-1 +0+0080 <[^>]*>.*14c10005.*bne \$a2,\$at,0+0098 <[^>]*> +0+0084 <[^>]*>.*64010001.*daddiu \$at,\$zero,1 +0+0088 <[^>]*>.*00010ffc.*dsll32 \$at,\$at,0x1f +0+008c <[^>]*>.*14a10002.*bne \$a1,\$at,0+0098 <[^>]*> +0+0090 <[^>]*>.*00000000.*nop +0+0094 <[^>]*>.*0000018d.*break 0x6 +0+0098 <[^>]*>.*00002012.*mflo \$a0 +0+009c <[^>]*>.*24010002.*li \$at,2 +0+00a0 <[^>]*>.*00a1001f.*ddivu \$zero,\$a1,\$at +0+00a4 <[^>]*>.*00002012.*mflo \$a0 +0+00a8 <[^>]*>.*34018000.*li \$at,0x8000 +0+00ac <[^>]*>.*00a1001e.*ddiv \$zero,\$a1,\$at +0+00b0 <[^>]*>.*00002010.*mfhi \$a0 + ... diff --git a/gas/testsuite/gas/mips/mul-ilocks.d b/gas/testsuite/gas/mips/mul-ilocks.d new file mode 100644 index 0000000..07478ea --- /dev/null +++ b/gas/testsuite/gas/mips/mul-ilocks.d @@ -0,0 +1,80 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#name: MIPS mul +#source: mul.s + +# Test the mul macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> multu \$a0,\$a1 +0+0004 <[^>]*> mflo \$a0 +0+0008 <[^>]*> multu \$a1,\$a2 +0+000c <[^>]*> mflo \$a0 +0+0010 <[^>]*> li \$at,0 +0+0014 <[^>]*> mult \$a1,\$at +0+0018 <[^>]*> mflo \$a0 +0+001c <[^>]*> li \$at,1 +0+0020 <[^>]*> mult \$a1,\$at +0+0024 <[^>]*> mflo \$a0 +0+0028 <[^>]*> li \$at,0x8000 +0+002c <[^>]*> mult \$a1,\$at +0+0030 <[^>]*> mflo \$a0 +0+0034 <[^>]*> li \$at,-32768 +0+0038 <[^>]*> mult \$a1,\$at +0+003c <[^>]*> mflo \$a0 +0+0040 <[^>]*> lui \$at,0x1 +0+0044 <[^>]*> mult \$a1,\$at +0+0048 <[^>]*> mflo \$a0 +0+004c <[^>]*> lui \$at,0x1 +0+0050 <[^>]*> ori \$at,\$at,0xa5a5 +0+0054 <[^>]*> mult \$a1,\$at +0+0058 <[^>]*> mflo \$a0 +0+005c <[^>]*> mult \$a0,\$a1 +0+0060 <[^>]*> mflo \$a0 +0+0064 <[^>]*> sra \$a0,\$a0,0x1f +0+0068 <[^>]*> mfhi \$at +0+006c <[^>]*> beq \$a0,\$at,0+78 +0+0070 <[^>]*> nop +0+0074 <[^>]*> break (0x0,0x6|0x6) +0+0078 <[^>]*> mflo \$a0 +0+007c <[^>]*> mult \$a1,\$a2 +0+0080 <[^>]*> mflo \$a0 +0+0084 <[^>]*> sra \$a0,\$a0,0x1f +0+0088 <[^>]*> mfhi \$at +0+008c <[^>]*> beq \$a0,\$at,0+98 +0+0090 <[^>]*> nop +0+0094 <[^>]*> break (0x0,0x6|0x6) +0+0098 <[^>]*> mflo \$a0 +0+009c <[^>]*> multu \$a0,\$a1 +0+00a0 <[^>]*> mfhi \$at +0+00a4 <[^>]*> mflo \$a0 +0+00a8 <[^>]*> beqz \$at,0+b4 +0+00ac <[^>]*> nop +0+00b0 <[^>]*> break (0x0,0x6|0x6) +0+00b4 <[^>]*> multu \$a1,\$a2 +0+00b8 <[^>]*> mfhi \$at +0+00bc <[^>]*> mflo \$a0 +0+00c0 <[^>]*> beqz \$at,0+cc +0+00c4 <[^>]*> nop +0+00c8 <[^>]*> break (0x0,0x6|0x6) +0+00cc <[^>]*> dmultu \$a1,\$a2 +0+00d0 <[^>]*> mflo \$a0 +0+00d4 <[^>]*> li \$at,1 +0+00d8 <[^>]*> dmult \$a1,\$at +0+00dc <[^>]*> mflo \$a0 +0+00e0 <[^>]*> dmult \$a1,\$a2 +0+00e4 <[^>]*> mflo \$a0 +0+00e8 <[^>]*> dsra32 \$a0,\$a0,0x1f +0+00ec <[^>]*> mfhi \$at +0+00f0 <[^>]*> beq \$a0,\$at,0+fc +0+00f4 <[^>]*> nop +0+00f8 <[^>]*> break (0x0,0x6|0x6) +0+00fc <[^>]*> mflo \$a0 +0+0100 <[^>]*> dmultu \$a1,\$a2 +0+0104 <[^>]*> mfhi \$at +0+0108 <[^>]*> mflo \$a0 +0+010c <[^>]*> beqz \$at,0+118 +0+0110 <[^>]*> nop +0+0114 <[^>]*> break (0x0,0x6|0x6) + ...