From: Hyeongseok Oh Date: Fri, 18 Aug 2017 02:50:27 +0000 (+0900) Subject: [RyuJIT/ARM32] Set carry bit: neg operation X-Git-Tag: accepted/tizen/base/20180629.140029~670^2~299^2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=770709d4161d5c5012fe1955df8a40d22daa4f03;p=platform%2Fupstream%2Fcoreclr.git [RyuJIT/ARM32] Set carry bit: neg operation Set carry bit when we generate ARM32 code for neg operation. --- diff --git a/src/jit/codegenarm.cpp b/src/jit/codegenarm.cpp index 8c28267..26c6854 100644 --- a/src/jit/codegenarm.cpp +++ b/src/jit/codegenarm.cpp @@ -823,7 +823,7 @@ void CodeGen::genCodeForNegNot(GenTree* tree) } else { - getEmitter()->emitIns_R_R_I(ins, emitTypeSize(tree), targetReg, operandReg, 0); + getEmitter()->emitIns_R_R_I(ins, emitTypeSize(tree), targetReg, operandReg, 0, INS_FLAGS_SET); } genProduceReg(tree);