From: Tony Date: Wed, 1 Jul 2020 08:17:28 +0000 (+0000) Subject: [AMDGPU] Correct AMDGPUUsage.rst DW_AT_LLVM_lane_pc example X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=76b2d9cbebd227d42e2099a0eb89c800b945997a;p=platform%2Fupstream%2Fllvm.git [AMDGPU] Correct AMDGPUUsage.rst DW_AT_LLVM_lane_pc example - Correct typo of DW_OP_xaddr to DW_OP_addrx in AMDGPUUsage.rst for DW_AT_LLVM_lane_pc example. Change-Id: I1b0ee2b24362a0240388e4c2f044c1d4883509b9 --- diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst index fcc4e99..36930fc 100644 --- a/llvm/docs/AMDGPUUsage.rst +++ b/llvm/docs/AMDGPUUsage.rst @@ -1656,7 +1656,7 @@ The following provides an example using pseudo LLVM MIR. DW_AT_name = "__divergent_lane_pc_1_then"; DW_AT_location = DIExpression[ DW_OP_call_ref %__divergent_lane_pc; - DW_OP_xaddr &lex_1_start; + DW_OP_addrx &lex_1_start; DW_OP_stack_value; DW_OP_LLVM_extend 64, 64; DW_OP_call_ref %__lex_1_save_exec; @@ -1679,7 +1679,7 @@ The following provides an example using pseudo LLVM MIR. DW_AT_name = "__divergent_lane_pc_1_1_then"; DW_AT_location = DIExpression[ DW_OP_call_ref %__divergent_lane_pc_1_then; - DW_OP_xaddr &lex_1_1_start; + DW_OP_addrx &lex_1_1_start; DW_OP_stack_value; DW_OP_LLVM_extend 64, 64; DW_OP_call_ref %__lex_1_1_save_exec; @@ -1698,7 +1698,7 @@ The following provides an example using pseudo LLVM MIR. DW_AT_name = "__divergent_lane_pc_1_1_else"; DW_AT_location = DIExpression[ DW_OP_call_ref %__divergent_lane_pc_1_then; - DW_OP_xaddr &lex_1_1_end; + DW_OP_addrx &lex_1_1_end; DW_OP_stack_value; DW_OP_LLVM_extend 64, 64; DW_OP_call_ref %__lex_1_1_save_exec; @@ -1724,7 +1724,7 @@ The following provides an example using pseudo LLVM MIR. DW_AT_name = "__divergent_lane_pc_1_else"; DW_AT_location = DIExpression[ DW_OP_call_ref %__divergent_lane_pc; - DW_OP_xaddr &lex_1_end; + DW_OP_addrx &lex_1_end; DW_OP_stack_value; DW_OP_LLVM_extend 64, 64; DW_OP_call_ref %__lex_1_save_exec;