From: Juan A. Suarez Romero Date: Tue, 11 Oct 2016 15:05:36 +0000 (+0000) Subject: i965/gen7: expose OpenGL 4.2 on Haswell when supported X-Git-Tag: upstream/17.1.0~3207 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=75968a668e44b3fd7c9b9277937c005366fca116;p=platform%2Fupstream%2Fmesa.git i965/gen7: expose OpenGL 4.2 on Haswell when supported GL_ARB_vertex_attrib_64bit was the last piece missing. v2: update docs (Jordan) Signed-off-by: Juan A. Suarez Romero Reviewed-by: Jordan Justen --- diff --git a/docs/features.txt b/docs/features.txt index efa780f..dd40ac4 100644 --- a/docs/features.txt +++ b/docs/features.txt @@ -136,7 +136,7 @@ GL 4.0, GLSL 4.00 --- all DONE: i965/hsw+, nvc0, r600, radeonsi GL_ARB_transform_feedback3 DONE (i965/gen7+, llvmpipe, softpipe, swr) -GL 4.1, GLSL 4.10 --- all DONE: i965/gen8+, nvc0, r600, radeonsi +GL 4.1, GLSL 4.10 --- all DONE: i965/hsw+, nvc0, r600, radeonsi GL_ARB_ES2_compatibility DONE (i965, nv50, llvmpipe, softpipe, swr) GL_ARB_get_program_binary DONE (0 binary formats) @@ -146,7 +146,7 @@ GL 4.1, GLSL 4.10 --- all DONE: i965/gen8+, nvc0, r600, radeonsi GL_ARB_viewport_array DONE (i965, nv50, llvmpipe, softpipe) -GL 4.2, GLSL 4.20 -- all DONE: i965/gen8+, nvc0, radeonsi +GL 4.2, GLSL 4.20 -- all DONE: i965/hsw+, nvc0, radeonsi GL_ARB_texture_compression_bptc DONE (i965, r600) GL_ARB_compressed_texture_pixel_storage DONE (all drivers) diff --git a/docs/relnotes/17.0.0.html b/docs/relnotes/17.0.0.html index bd397d2..b50f9e9 100644 --- a/docs/relnotes/17.0.0.html +++ b/docs/relnotes/17.0.0.html @@ -50,7 +50,7 @@ Note: some of the new features are only available with certain drivers.
  • GL_ARB_gpu_shader_fp64 in i965/haswell
  • GL_ARB_vertex_attrib_64bit in i965/haswell
  • GL_ARB_shader_precision in i965/haswell
    • -
  • Intel Haswell now supports OpenGL 4.0
    • +
  • Intel Haswell now supports OpenGL 4.2
  • GL_OES_geometry_shader on i965/haswell
  • GL_OES_texture_cube_map_array on i965/haswell
  • GL_OES_viewport_array on i965/haswell
    • diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index dc46772..7a40eba 100644 --- a/src/mesa/drivers/dri/i965/intel_extensions.c +++ b/src/mesa/drivers/dri/i965/intel_extensions.c @@ -137,7 +137,7 @@ intelInitExtensions(struct gl_context *ctx) if (brw->gen >= 8) ctx->Const.GLSLVersion = 450; else if (brw->is_haswell && can_do_pipelined_register_writes(brw->screen)) - ctx->Const.GLSLVersion = 400; + ctx->Const.GLSLVersion = 420; else if (brw->gen >= 6) ctx->Const.GLSLVersion = 330; else diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 5fcb5c6..a8d401c 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -1539,7 +1539,7 @@ set_max_gl_versions(struct intel_screen *screen) break; case 7: dri_screen->max_gl_core_version = screen->devinfo.is_haswell && - can_do_pipelined_register_writes(screen) ? 40 : 33; + can_do_pipelined_register_writes(screen) ? 42 : 33; dri_screen->max_gl_compat_version = 30; dri_screen->max_gl_es1_version = 11; dri_screen->max_gl_es2_version = screen->devinfo.is_haswell ? 31 : 30;