From: Joerg Sonnenberger Date: Mon, 4 Aug 2014 23:53:42 +0000 (+0000) Subject: Add TCR register access X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=755ffa9b5478c8227cc45cf3aecd5cd47ea7924b;p=platform%2Fupstream%2Fllvm.git Add TCR register access llvm-svn: 214826 --- diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index eea1fca..cf20bae 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -3279,6 +3279,9 @@ def : InstAlias<"mfdear $Rx", (MFSPR gprc:$Rx, 981)>, Requires<[IsPPC4xx]>; def : InstAlias<"mtesr $Rx", (MTSPR 980, gprc:$Rx)>, Requires<[IsPPC4xx]>; def : InstAlias<"mfesr $Rx", (MFSPR gprc:$Rx, 980)>, Requires<[IsPPC4xx]>; +def : InstAlias<"mttcr $Rx", (MTSPR 986, gprc:$Rx)>, Requires<[IsPPC4xx]>; +def : InstAlias<"mftcr $Rx", (MFSPR gprc:$Rx, 986)>, Requires<[IsPPC4xx]>; + def LAx : PPCAsmPseudo<"la $rA, $addr", (ins gprc:$rA, memri:$addr)>; def SUBI : PPCAsmPseudo<"subi $rA, $rB, $imm", diff --git a/llvm/test/MC/PowerPC/ppc64-encoding-4xx.s b/llvm/test/MC/PowerPC/ppc64-encoding-4xx.s index 8e010e3..5fca73e 100644 --- a/llvm/test/MC/PowerPC/ppc64-encoding-4xx.s +++ b/llvm/test/MC/PowerPC/ppc64-encoding-4xx.s @@ -70,3 +70,10 @@ # CHECK-BE: mtspr 980, 2 # encoding: [0x7c,0x54,0xf3,0xa6] # CHECK-LE: mtspr 980, 2 # encoding: [0xa6,0xf3,0x54,0x7c] mtesr %r2 + +# CHECK-BE: mfspr 2, 986 # encoding: [0x7c,0x5a,0xf2,0xa6] +# CHECK-LE: mfspr 2, 986 # encoding: [0xa6,0xf2,0x5a,0x7c] + mftcr %r2 +# CHECK-BE: mtspr 986, 2 # encoding: [0x7c,0x5a,0xf3,0xa6] +# CHECK-LE: mtspr 986, 2 # encoding: [0xa6,0xf3,0x5a,0x7c] + mttcr %r2