From: 김수진/On-Device Lab(SR)/Engineer/삼성전자 <sjsujin.kim@samsung.com>
Date: Tue, 12 Mar 2019 07:42:11 +0000 (+0900)
Subject: [neurun] Enable ReLU, RSQRT ops (#4642)
X-Git-Tag: submit/tizen/20190325.013700~91
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=74e4bfb2b4f5c8c70bb1b1e7765333f8c69ded4b;p=platform%2Fcore%2Fml%2Fnnfw.git

[neurun] Enable ReLU, RSQRT ops (#4642)

This commit enables `ReLU`, `RSQRT` for `acl_ac`.

Signed-off-by: sjsujinkim <sjsujin.kim@samsung.com>
---

diff --git a/runtimes/neurun/src/backend/acl_cl/StageGenerator.cc b/runtimes/neurun/src/backend/acl_cl/StageGenerator.cc
index d828e96..e8bcbd3 100644
--- a/runtimes/neurun/src/backend/acl_cl/StageGenerator.cc
+++ b/runtimes/neurun/src/backend/acl_cl/StageGenerator.cc
@@ -1665,6 +1665,77 @@ void StageGenerator::visit(const model::operation::NotEqualNode &node)
   });
 }
 
+void StageGenerator::visit(const model::operation::RSQRTNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::LogisticNode::Input::INPUT)};
+
+  // Construct operation parameters
+  struct Param
+  {
+    model::operand::Index ofm_index;
+    model::operand::Index ifm_index;
+  };
+
+  Param param;
+
+  param.ofm_index = output_index;
+  param.ifm_index = input_index;
+
+  auto tensors = _tensor_builder;
+
+  returnStage([tensors, param](IExecutionBuilder &builder) {
+    auto ofm_alloc = tensors->at(param.ofm_index).get();
+    auto ifm_alloc = tensors->at(param.ifm_index).get();
+
+    const ::arm_compute::ActivationLayerInfoEx act_info{
+        ::arm_compute::ActivationLayerInfoEx::ActivationFunction::RSQRT};
+
+    auto fn = make_layer<::arm_compute::CLActivationLayerEx>();
+
+    fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), act_info);
+
+    auto acl_fn = make_cl_function(std::move(fn));
+
+    builder.append(std::move(acl_fn));
+  });
+}
+
+void StageGenerator::visit(const model::operation::ReLUNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::ReLUNode::Input::INPUT)};
+
+  struct Param
+  {
+    model::operand::Index output_index;
+    model::operand::Index input_index;
+  };
+
+  Param param;
+
+  param.output_index = output_index;
+  param.input_index = input_index;
+
+  auto tensors = _tensor_builder;
+
+  returnStage([tensors, param](IExecutionBuilder &builder) {
+    auto output_alloc = tensors->at(param.output_index).get();
+    auto input_alloc = tensors->at(param.input_index).get();
+
+    auto fn = make_layer<arm_compute::CLActivationLayer>();
+
+    const ::arm_compute::ActivationLayerInfo act_info{
+        ::arm_compute::ActivationLayerInfo::ActivationFunction::RELU};
+
+    fn->configure(input_alloc->handle(), output_alloc->handle(), act_info);
+
+    auto acl_fn = make_cl_function(std::move(fn));
+
+    builder.append(std::move(acl_fn));
+  });
+}
+
 } // namespace acl_cl
 } // namespace backend
 } // namespace neurun
diff --git a/runtimes/neurun/src/backend/acl_cl/StageGenerator.h b/runtimes/neurun/src/backend/acl_cl/StageGenerator.h
index 850694a..686293c 100644
--- a/runtimes/neurun/src/backend/acl_cl/StageGenerator.h
+++ b/runtimes/neurun/src/backend/acl_cl/StageGenerator.h
@@ -60,6 +60,8 @@ public:
   virtual void visit(const model::operation::ReduceMaxNode &) override;
   virtual void visit(const model::operation::NotEqualNode &) override;
   virtual void visit(const model::operation::LogicalAndNode &) override;
+  virtual void visit(const model::operation::RSQRTNode &) override;
+  virtual void visit(const model::operation::ReLUNode &) override;
 
 private:
   const neurun::model::operand::Set &_ctx;
diff --git a/runtimes/neurun/src/frontend/wrapper/OperationFactory.cc b/runtimes/neurun/src/frontend/wrapper/OperationFactory.cc
index 980d859..8275e07 100644
--- a/runtimes/neurun/src/frontend/wrapper/OperationFactory.cc
+++ b/runtimes/neurun/src/frontend/wrapper/OperationFactory.cc
@@ -629,6 +629,32 @@ OperationFactory::OperationFactory()
 
     return new operation::LogicalAndNode{inputs, outputs};
   };
+
+  _map[ANEURALNETWORKS_RSQRT_EX] = [](const OperationFactory::Param &init_param) {
+    assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+    operand::IndexSet outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Input Tensor Index
+    operand::IndexSet inputs{init_param.inputs[0]};
+
+    return new operation::RSQRTNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_RELU] = [](const OperationFactory::Param &init_param) {
+    assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+    operand::IndexSet outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Input Tensor Index
+    operand::IndexSet inputs{init_param.inputs[0]};
+
+    return new operation::ReLUNode{inputs, outputs};
+  };
 }
 
 neurun::model::operation::Node *OperationFactory::create(ANeuralNetworksOperationType type,
diff --git a/runtimes/neurun/src/model/operation/Node.Include.h b/runtimes/neurun/src/model/operation/Node.Include.h
index 56f4499..7289c9d 100644
--- a/runtimes/neurun/src/model/operation/Node.Include.h
+++ b/runtimes/neurun/src/model/operation/Node.Include.h
@@ -40,3 +40,5 @@
 #include "ReduceMaxNode.h"
 #include "NotEqualNode.h"
 #include "LogicalAndNode.h"
+#include "RSQRTNode.h"
+#include "ReLUNode.h"
diff --git a/runtimes/neurun/src/model/operation/Op.lst b/runtimes/neurun/src/model/operation/Op.lst
index 12dea54..a3ea626 100644
--- a/runtimes/neurun/src/model/operation/Op.lst
+++ b/runtimes/neurun/src/model/operation/Op.lst
@@ -44,4 +44,6 @@ OP(ExpNode                 , true    , EXP_EX)
 OP(ReduceMaxNode           , true    , TENSORFLOW_MAX_EX)
 OP(NotEqualNode            , true    , NOT_EQUAL_EX)
 OP(LogicalAndNode          , true    , LOGICAL_AND_EX)
+OP(RSQRTNode               , true    , RSQRT_EX)
+OP(ReLUNode                , true    , RELU)
 OP(PermuteNode             , false   , NOT_AVAILABLE)
diff --git a/runtimes/neurun/src/model/operation/RSQRTNode.cc b/runtimes/neurun/src/model/operation/RSQRTNode.cc
new file mode 100644
index 0000000..77ad3c9
--- /dev/null
+++ b/runtimes/neurun/src/model/operation/RSQRTNode.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "RSQRTNode.h"
+
+#include <cassert>
+
+#include "NodeVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void RSQRTNode::accept(NodeVisitor &&v) const { v.visit(*this); }
+
+RSQRTNode::RSQRTNode(const operand::IndexSet &inputs, const operand::IndexSet &outputs)
+    : model::operation::Node{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/src/model/operation/RSQRTNode.h b/runtimes/neurun/src/model/operation/RSQRTNode.h
new file mode 100644
index 0000000..a75e591
--- /dev/null
+++ b/runtimes/neurun/src/model/operation/RSQRTNode.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_RSQRT_NODE_H__
+#define __NEURUN_MODEL_OPERATION_RSQRT_NODE_H__
+
+#include "model/operation/Node.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class RSQRTNode : public model::operation::Node
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+public:
+  RSQRTNode(const operand::IndexSet &inputs, const operand::IndexSet &outputs);
+
+public:
+  virtual void accept(NodeVisitor &&) const override;
+  virtual std::string getName() const override { return "RSQRT"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_RSQRT_NODE_H__
diff --git a/runtimes/neurun/src/model/operation/ReLUNode.cc b/runtimes/neurun/src/model/operation/ReLUNode.cc
new file mode 100644
index 0000000..692f648
--- /dev/null
+++ b/runtimes/neurun/src/model/operation/ReLUNode.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ReLUNode.h"
+
+#include <cassert>
+
+#include "NodeVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void ReLUNode::accept(NodeVisitor &&v) const { v.visit(*this); }
+
+ReLUNode::ReLUNode(const operand::IndexSet &inputs, const operand::IndexSet &outputs)
+    : model::operation::Node{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/src/model/operation/ReLUNode.h b/runtimes/neurun/src/model/operation/ReLUNode.h
new file mode 100644
index 0000000..ce45855
--- /dev/null
+++ b/runtimes/neurun/src/model/operation/ReLUNode.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_RELU_NODE_H__
+#define __NEURUN_MODEL_OPERATION_RELU_NODE_H__
+
+#include "model/operation/Node.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class ReLUNode : public model::operation::Node
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+public:
+  ReLUNode(const operand::IndexSet &inputs, const operand::IndexSet &outputs);
+
+public:
+  virtual void accept(NodeVisitor &&) const override;
+  virtual std::string getName() const override { return "ReLU"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_RELU_NODE_H__
diff --git a/tests/nnapi/nnapi_gtest.skip.armv7l-linux.neurun b/tests/nnapi/nnapi_gtest.skip.armv7l-linux.neurun
index 5904043..7d91c12 100644
--- a/tests/nnapi/nnapi_gtest.skip.armv7l-linux.neurun
+++ b/tests/nnapi/nnapi_gtest.skip.armv7l-linux.neurun
@@ -32,10 +32,8 @@ GeneratedTests.prelu_ex*
 GeneratedTests.reduce_min*
 GeneratedTests.relu1*
 GeneratedTests.relu6*
-GeneratedTests.relu*
 GeneratedTests.resize_bilinear*
 GeneratedTests.rnn*
-GeneratedTests.rsqrt*
 GeneratedTests.mean*
 GeneratedTests.pad*
 GeneratedTests.space_to_depth*
diff --git a/tests/scripts/neurun_frameworktest_list.armv7l.acl_cl.txt b/tests/scripts/neurun_frameworktest_list.armv7l.acl_cl.txt
index 71542eb..ec63189 100644
--- a/tests/scripts/neurun_frameworktest_list.armv7l.acl_cl.txt
+++ b/tests/scripts/neurun_frameworktest_list.armv7l.acl_cl.txt
@@ -14,7 +14,9 @@ mul/broadcast
 not_equal
 softmax
 reduce_max
+relu
 reshape
+rsqrt
 strided_slice
 sub/broadcast
 tanh