From: Bard Liao Date: Fri, 24 Apr 2015 07:19:29 +0000 (+0800) Subject: ASoC: rt5677: add register patch for PLL X-Git-Tag: v4.14-rc1~5260^2~39^2^2~1 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=74d6ea52aeef0236242221c6eff6d892565c5a92;p=platform%2Fkernel%2Flinux-rpi.git ASoC: rt5677: add register patch for PLL The PLL output will be unstable in some cases. We can fix it by setting some registers. Signed-off-by: Bard Liao Signed-off-by: Mark Brown Cc: stable@vger.kernel.org --- diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c index 5d0bb8748dd1..c6d4e8fa8bd3 100644 --- a/sound/soc/codecs/rt5677.c +++ b/sound/soc/codecs/rt5677.c @@ -62,6 +62,9 @@ static const struct reg_default init_list[] = { {RT5677_PR_BASE + 0x1e, 0x0000}, {RT5677_PR_BASE + 0x12, 0x0eaa}, {RT5677_PR_BASE + 0x14, 0x018a}, + {RT5677_PR_BASE + 0x15, 0x0490}, + {RT5677_PR_BASE + 0x38, 0x0f71}, + {RT5677_PR_BASE + 0x39, 0x0f71}, }; #define RT5677_INIT_REG_LEN ARRAY_SIZE(init_list)