From: aurel32 Date: Sat, 1 Nov 2008 00:53:19 +0000 (+0000) Subject: Malta & OMAP: add a name to char devices X-Git-Tag: TizenStudio_2.0_p2.3~10641 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=74606cbaacef3e9a6ab7ce077a3090fd48a25f5e;p=sdk%2Femulator%2Fqemu.git Malta & OMAP: add a name to char devices (fixes regression introduced by r5575) Signed-off-by: Aurelien Jarno git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5585 c046a42c-6fe2-441c-8c8c-71466251a162 --- diff --git a/hw/mips_malta.c b/hw/mips_malta.c index 629e914..5027f8d 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -435,7 +435,7 @@ static MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, CPUState *env) cpu_register_physical_memory(base, 0x900, malta); cpu_register_physical_memory(base + 0xa00, 0x100000 - 0xa00, malta); - s->display = qemu_chr_open("vc:320x200"); + s->display = qemu_chr_open("fpga", "vc:320x200"); qemu_chr_printf(s->display, "\e[HMalta LEDBAR\r\n"); qemu_chr_printf(s->display, "+--------+\r\n"); qemu_chr_printf(s->display, "+ +\r\n"); @@ -446,7 +446,7 @@ static MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, CPUState *env) qemu_chr_printf(s->display, "+ +\r\n"); qemu_chr_printf(s->display, "+--------+\r\n"); - uart_chr = qemu_chr_open("vc:80Cx24C"); + uart_chr = qemu_chr_open("cbus", "vc:80Cx24C"); qemu_chr_printf(uart_chr, "CBUS UART\r\n"); s->uart = serial_mm_init(base + 0x900, 3, env->irq[2], 230400, uart_chr, 1); diff --git a/hw/omap1.c b/hw/omap1.c index a32563b..0c3b5cd 100644 --- a/hw/omap1.c +++ b/hw/omap1.c @@ -2017,7 +2017,7 @@ struct omap_uart_s *omap_uart_init(target_phys_addr_t base, s->fclk = fclk; s->irq = irq; s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16, - chr ?: qemu_chr_open("null"), 1); + chr ?: qemu_chr_open("null", "null"), 1); return s; } @@ -2128,7 +2128,7 @@ void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr) /* TODO: Should reuse or destroy current s->serial */ s->serial = serial_mm_init(s->base, 2, s->irq, omap_clk_getrate(s->fclk) / 16, - chr ?: qemu_chr_open("null"), 1); + chr ?: qemu_chr_open("null", "null"), 1); } /* MPU Clock/Reset/Power Mode Control */ diff --git a/hw/omap2.c b/hw/omap2.c index 5add059..495e72f 100644 --- a/hw/omap2.c +++ b/hw/omap2.c @@ -2185,7 +2185,7 @@ static struct omap_sti_s *omap_sti_init(struct omap_target_agent_s *ta, s->irq = irq; omap_sti_reset(s); - s->chr = chr ?: qemu_chr_open("null"); + s->chr = chr ?: qemu_chr_open("null", "null"); iomemtype = l4_register_io_memory(0, omap_sti_readfn, omap_sti_writefn, s);