From: Konrad Dybcio Date: Wed, 14 Jun 2023 11:35:33 +0000 (+0200) Subject: clk: qcom: gpucc-sm6350: Fix clock source names X-Git-Tag: v6.6.7~2041^2^2~1^2~60 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=743913b343a3ec2510fe3c0dfaff03d049659922;p=platform%2Fkernel%2Flinux-starfive.git clk: qcom: gpucc-sm6350: Fix clock source names fw_name for GCC inputs didn't match the bindings. Fix it. Fixes: 013804a727a0 ("clk: qcom: Add GPU clock controller driver for SM6350") Signed-off-by: Konrad Dybcio Link: https://lore.kernel.org/r/20230315-topic-lagoon_gpu-v2-2-afcdfb18bb13@linaro.org Signed-off-by: Bjorn Andersson --- diff --git a/drivers/clk/qcom/gpucc-sm6350.c b/drivers/clk/qcom/gpucc-sm6350.c index a9887d1..0bcbba2 100644 --- a/drivers/clk/qcom/gpucc-sm6350.c +++ b/drivers/clk/qcom/gpucc-sm6350.c @@ -132,8 +132,8 @@ static const struct clk_parent_data gpu_cc_parent_data_0[] = { { .index = DT_BI_TCXO, .fw_name = "bi_tcxo" }, { .hw = &gpu_cc_pll0.clkr.hw }, { .hw = &gpu_cc_pll1.clkr.hw }, - { .index = DT_GPLL0_OUT_MAIN, .fw_name = "gcc_gpu_gpll0_clk" }, - { .index = DT_GPLL0_OUT_MAIN_DIV, .fw_name = "gcc_gpu_gpll0_div_clk" }, + { .index = DT_GPLL0_OUT_MAIN, .fw_name = "gcc_gpu_gpll0_clk_src" }, + { .index = DT_GPLL0_OUT_MAIN_DIV, .fw_name = "gcc_gpu_gpll0_div_clk_src" }, }; static const struct parent_map gpu_cc_parent_map_1[] = { @@ -151,7 +151,7 @@ static const struct clk_parent_data gpu_cc_parent_data_1[] = { { .hw = &gpu_cc_pll0.clkr.hw }, { .hw = &gpu_cc_pll1.clkr.hw }, { .hw = &gpu_cc_pll1.clkr.hw }, - { .index = DT_GPLL0_OUT_MAIN, .fw_name = "gcc_gpu_gpll0_clk" }, + { .index = DT_GPLL0_OUT_MAIN, .fw_name = "gcc_gpu_gpll0_clk_src" }, }; static const struct freq_tbl ftbl_gpu_cc_gmu_clk_src[] = {