From: David Edelsohn <dje.gcc@gmail.com>
Date: Thu, 24 Apr 1997 00:56:33 +0000 (+0000)
Subject: 	* tconfig.in: New file.
X-Git-Tag: gdb-4_18~5662
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=73da4db5873e6c759c2a755a8eaebb94b49a0f86;p=external%2Fbinutils.git

	* tconfig.in: New file.
	* interp.c (sim_open): Handle missing arg to -E.
---

diff --git a/sim/sh/.Sanitize b/sim/sh/.Sanitize
index 4b62874..0c6c23f 100644
--- a/sim/sh/.Sanitize
+++ b/sim/sh/.Sanitize
@@ -33,6 +33,7 @@ configure.in
 interp.c
 gencode.c
 syscall.h
+tconfig.in
 
 Things-to-lose:
 
diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog
index c83d7f6..dd0444f 100644
--- a/sim/sh/ChangeLog
+++ b/sim/sh/ChangeLog
@@ -1,3 +1,8 @@
+Wed Apr 23 17:55:22 1997  Doug Evans  <dje@canuck.cygnus.com>
+
+	* tconfig.in: New file.
+	* interp.c (sim_open): Handle missing arg to -E.
+
 Tue Apr 22 08:55:35 1997  Stu Grossman  (grossman@critters.cygnus.com)
 
 	* Makefile.in:  Add clean targets.
diff --git a/sim/sh/tconfig.in b/sim/sh/tconfig.in
new file mode 100644
index 0000000..c5ec4fa
--- /dev/null
+++ b/sim/sh/tconfig.in
@@ -0,0 +1,17 @@
+/* sh target config file */
+
+/* Define this if the simulator supports profiling.
+   See the mips simulator for an example.
+   This enables the `-p foo' and `-s bar' options.
+   The target is required to provide sim_set_profile{,_size}.  */
+/* #define SIM_HAVE_PROFILE */
+
+/* Define this if the simulator uses an instruction cache.
+   See the h8/300 simulator for an example.
+   This enables the `-c size' option to set the size of the cache.
+   The target is required to provide sim_set_simcache_size.  */
+/* #define SIM_HAVE_SIMCACHE */
+
+/* Define this if the target cpu is bi-endian
+   and the simulator supports it.  */
+#define SIM_HAVE_BIENDIAN