From: Xingyu Wu <xingyu.wu@starfivetech.com>
Date: Tue, 8 Nov 2022 14:04:07 +0000 (+0800)
Subject: dma:dw:Add stg_axi clock and reset of noc_bus
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=73a3324f6ed8421531fd983908f980c770e38696;p=platform%2Fkernel%2Flinux-starfive.git

dma:dw:Add stg_axi clock and reset of noc_bus

Add 'JH7110_NOC_BUS_CLK_STG_AXI' clock and
'RSTN_U0_NOC_BUS_STG_AXI_N' reset.

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
---

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index b61575f1c1e9..1c50e2e5a2f4 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -556,11 +556,13 @@
 			compatible = "starfive,jh7110-dma", "snps,axi-dma-1.01a";
 			reg = <0x0 0x16050000 0x0 0x10000>;
 			clocks = <&clkgen JH7110_DMA1P_CLK_AXI>,
-				 <&clkgen JH7110_DMA1P_CLK_AHB>;
-			clock-names = "core-clk", "cfgr-clk";
+				 <&clkgen JH7110_DMA1P_CLK_AHB>,
+				 <&clkgen JH7110_NOC_BUS_CLK_STG_AXI>;
+			clock-names = "core-clk", "cfgr-clk", "stg_clk";
 			resets = <&rstgen RSTN_U0_DW_DMA1P_AXI>,
-				 <&rstgen RSTN_U0_DW_DMA1P_AHB>;
-			reset-names = "rst_axi", "rst_ahb";
+				 <&rstgen RSTN_U0_DW_DMA1P_AHB>,
+				 <&rstgen RSTN_U0_NOC_BUS_STG_AXI_N>;
+			reset-names = "rst_axi", "rst_ahb", "rst_stg";
 			interrupts = <73>;
 			#dma-cells = <2>;
 			dma-channels = <4>;
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index 836f348f8d5d..a4e690ecbe1b 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -1281,6 +1281,7 @@ static int axi_dma_suspend(struct axi_dma_chip *chip)
 
 	clk_disable_unprepare(chip->core_clk);
 	clk_disable_unprepare(chip->cfgr_clk);
+	clk_disable_unprepare(chip->axi_clk);
 
 	return 0;
 }
@@ -1289,6 +1290,10 @@ static int axi_dma_resume(struct axi_dma_chip *chip)
 {
 	int ret;
 
+	ret = clk_prepare_enable(chip->axi_clk);
+	if (ret < 0)
+		return ret;
+
 	ret = clk_prepare_enable(chip->cfgr_clk);
 	if (ret < 0)
 		return ret;
@@ -1478,6 +1483,10 @@ static int dw_probe(struct platform_device *pdev)
 			return PTR_ERR(chip->apb_regs);
 	}
 
+	chip->axi_clk = devm_clk_get(chip->dev, "stg_clk");
+	if (IS_ERR(chip->axi_clk))
+		return PTR_ERR(chip->axi_clk);
+
 	chip->core_clk = devm_clk_get(chip->dev, "core-clk");
 	if (IS_ERR(chip->core_clk))
 		return PTR_ERR(chip->core_clk);
@@ -1486,6 +1495,11 @@ static int dw_probe(struct platform_device *pdev)
 	if (IS_ERR(chip->cfgr_clk))
 		return PTR_ERR(chip->cfgr_clk);
 
+	chip->rst_axi = devm_reset_control_get_exclusive(&pdev->dev, "rst_stg");
+	if (IS_ERR(chip->rst_axi)) {
+		dev_err(&pdev->dev, "%s: failed to get rst_stg reset control\n", __func__);
+		return PTR_ERR(chip->rst_axi);
+	}
 	chip->rst_core = devm_reset_control_get_exclusive(&pdev->dev, "rst_axi");
 	if (IS_ERR(chip->rst_core)) {
 		dev_err(&pdev->dev, "%s: failed to get rst_core reset control\n", __func__);
@@ -1497,6 +1511,7 @@ static int dw_probe(struct platform_device *pdev)
 		return PTR_ERR(chip->rst_cfgr);
 	}
 
+	reset_control_deassert(chip->rst_axi);
 	reset_control_deassert(chip->rst_core);
 	reset_control_deassert(chip->rst_cfgr);
 
@@ -1612,6 +1627,7 @@ static int dw_remove(struct platform_device *pdev)
 	u32 i;
 
 	/* Enable clk before accessing to registers */
+	clk_prepare_enable(chip->axi_clk);
 	clk_prepare_enable(chip->cfgr_clk);
 	clk_prepare_enable(chip->core_clk);
 	axi_dma_irq_disable(chip);
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
index d229d88684d4..416cc4b52f13 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
@@ -99,10 +99,12 @@ struct axi_dma_chip {
 	void __iomem		*apb_regs;
 	struct clk		*core_clk;
 	struct clk		*cfgr_clk;
+	struct clk		*axi_clk;
 	struct dw_axi_dma	*dw;
 	struct dma_multi	multi;
 	struct reset_control	*rst_core;
 	struct reset_control	*rst_cfgr;
+	struct reset_control	*rst_axi;
 };
 
 /* LLI == Linked List Item */