From: Russell King <rmk+kernel@arm.linux.org.uk>
Date: Sat, 9 Mar 2013 15:49:32 +0000 (+0000)
Subject: Merge branch 'for-next' of git://git.pengutronix.de/git/ukl/linux into devel-stable
X-Git-Tag: v5.15~20206^2~5
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=73a09d212ec65b7068a283e6034fa05649d3d075;p=platform%2Fkernel%2Flinux-starfive.git

Merge branch 'for-next' of git://git.pengutronix.de/git/ukl/linux into devel-stable

Conflicts:
	arch/arm/include/asm/cputype.h

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---

73a09d212ec65b7068a283e6034fa05649d3d075
diff --cc arch/arm/Kconfig
index 5b71469,e04c779..dedf02b6
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@@ -1680,12 -1655,10 +1680,13 @@@ config H
  	default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
  	default 100
  
 +config SCHED_HRTICK
 +	def_bool HIGH_RES_TIMERS
 +
  config THUMB2_KERNEL
- 	bool "Compile the kernel in Thumb-2 mode"
+ 	bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
  	depends on CPU_V7 && !CPU_V6 && !CPU_V6K
+ 	default y if CPU_THUMBONLY
  	select AEABI
  	select ARM_ASM_UNIFIED
  	select ARM_UNWIND
diff --cc arch/arm/include/asm/cputype.h
index ad41ec2,574269e..7652712
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@@ -38,6 -38,6 +38,24 @@@
  #define MPIDR_AFFINITY_LEVEL(mpidr, level) \
  	((mpidr >> (MPIDR_LEVEL_BITS * level)) & MPIDR_LEVEL_MASK)
  
++#define ARM_CPU_IMP_ARM			0x41
++#define ARM_CPU_IMP_INTEL		0x69
++
++#define ARM_CPU_PART_ARM1136		0xB360
++#define ARM_CPU_PART_ARM1156		0xB560
++#define ARM_CPU_PART_ARM1176		0xB760
++#define ARM_CPU_PART_ARM11MPCORE	0xB020
++#define ARM_CPU_PART_CORTEX_A8		0xC080
++#define ARM_CPU_PART_CORTEX_A9		0xC090
++#define ARM_CPU_PART_CORTEX_A5		0xC050
++#define ARM_CPU_PART_CORTEX_A15		0xC0F0
++#define ARM_CPU_PART_CORTEX_A7		0xC070
++
++#define ARM_CPU_XSCALE_ARCH_MASK	0xe000
++#define ARM_CPU_XSCALE_ARCH_V1		0x2000
++#define ARM_CPU_XSCALE_ARCH_V2		0x4000
++#define ARM_CPU_XSCALE_ARCH_V3		0x6000
++
  extern unsigned int processor_id;
  
  #ifdef CONFIG_CPU_CP15
@@@ -92,21 -88,15 +106,30 @@@ static inline unsigned int __attribute_
  	return read_cpuid(CPUID_ID);
  }
  
+ #else /* ifdef CONFIG_CPU_CP15 */
+ 
+ static inline unsigned int __attribute_const__ read_cpuid_id(void)
+ {
+ 	return processor_id;
+ }
+ 
+ #endif /* ifdef CONFIG_CPU_CP15 / else */
+ 
 +static inline unsigned int __attribute_const__ read_cpuid_implementor(void)
 +{
 +	return (read_cpuid_id() & 0xFF000000) >> 24;
 +}
 +
 +static inline unsigned int __attribute_const__ read_cpuid_part_number(void)
 +{
 +	return read_cpuid_id() & 0xFFF0;
 +}
 +
 +static inline unsigned int __attribute_const__ xscale_cpu_arch_version(void)
 +{
 +	return read_cpuid_part_number() & ARM_CPU_XSCALE_ARCH_MASK;
 +}
 +
  static inline unsigned int __attribute_const__ read_cpuid_cachetype(void)
  {
  	return read_cpuid(CPUID_CACHETYPE);