From: Emil Velikov Date: Mon, 31 Jul 2017 18:46:23 +0000 (+0100) Subject: i965: expose RGBA visuals only on Android X-Git-Tag: upstream/18.1.0~6232 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=731ba6924a2ed6cdf47a78fd637a91a19ddcf9ed;p=platform%2Fupstream%2Fmesa.git i965: expose RGBA visuals only on Android As Marek pointed out in earlier commit - exposing RGBA on other platforms introduces ~500 Visuals, which are not tested. Note that this does not quite happen, yet. Reason being that the GLX code does not check the masks - see scaralEqual(). Thus as we fix that, we'll run into the issue described. v2: Rebase, while keeping loaderPrivate v3: Beef-up commit message, getCapability() returns unsigned (Tapani) Fixes: 1bf703e4ea5 ("dri_interface,egl,gallium: only expose RGBA visuals on Android") Cc: Tomasz Figa Cc: Chad Versace Cc: Marek Olšák Signed-off-by: Emil Velikov Reviewed-by: Tapani Pälli --- diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index d39509b..b11c22d 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -1846,6 +1846,20 @@ intel_supported_msaa_modes(const struct intel_screen *screen) } } +static unsigned +intel_loader_get_cap(const __DRIscreen *dri_screen, enum dri_loader_cap cap) +{ + if (dri_screen->dri2.loader && dri_screen->dri2.loader->base.version >= 4 && + dri_screen->dri2.loader->getCapability) + return dri_screen->dri2.loader->getCapability(dri_screen->loaderPrivate, cap); + + if (dri_screen->image.loader && dri_screen->image.loader->base.version >= 2 && + dri_screen->image.loader->getCapability) + return dri_screen->image.loader->getCapability(dri_screen->loaderPrivate, cap); + + return 0; +} + static __DRIconfig** intel_screen_make_configs(__DRIscreen *dri_screen) { @@ -1888,8 +1902,15 @@ intel_screen_make_configs(__DRIscreen *dri_screen) uint8_t depth_bits[4], stencil_bits[4]; __DRIconfig **configs = NULL; + /* Expose only BGRA ordering if the loader doesn't support RGBA ordering. */ + unsigned num_formats; + if (intel_loader_get_cap(dri_screen, DRI_LOADER_CAP_RGBA_ORDERING)) + num_formats = ARRAY_SIZE(formats); + else + num_formats = 3; + /* Generate singlesample configs without accumulation buffer. */ - for (unsigned i = 0; i < ARRAY_SIZE(formats); i++) { + for (unsigned i = 0; i < num_formats; i++) { __DRIconfig **new_configs; int num_depth_stencil_bits = 2;