From: Julien Thierry Date: Tue, 11 Jun 2019 09:38:06 +0000 (+0100) Subject: arm64: Do not enable IRQs for ct_user_exit X-Git-Tag: v4.19.61~181 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=723ba79384922f6fbf910dfd8af307c86517378c;p=platform%2Fkernel%2Flinux-rpi.git arm64: Do not enable IRQs for ct_user_exit [ Upstream commit 9034f6251572a4744597c51dea5ab73a55f2b938 ] For el0_dbg and el0_error, DAIF bits get explicitly cleared before calling ct_user_exit. When context tracking is disabled, DAIF gets set (almost) immediately after. When context tracking is enabled, among the first things done is disabling IRQs. What is actually needed is: - PSR.D = 0 so the system can be debugged (should be already the case) - PSR.A = 0 so async error can be handled during context tracking Do not clear PSR.I in those two locations. Reviewed-by: Marc Zyngier Acked-by: Mark Rutland Reviewed-by: James Morse Cc: Will Deacon Signed-off-by: Julien Thierry Signed-off-by: Catalin Marinas Signed-off-by: Sasha Levin --- diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index 8556876..5f800384 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -824,7 +824,7 @@ el0_dbg: mov x1, x25 mov x2, sp bl do_debug_exception - enable_daif + enable_da_f ct_user_exit b ret_to_user el0_inv: @@ -876,7 +876,7 @@ el0_error_naked: enable_dbg mov x0, sp bl do_serror - enable_daif + enable_da_f ct_user_exit b ret_to_user ENDPROC(el0_error)