From: Peng Fan <peng.fan@nxp.com>
Date: Tue, 8 Aug 2017 08:21:38 +0000 (+0800)
Subject: imx: mx6sx: select OSC as uart's clk parent
X-Git-Tag: v2017.09-rc3~74^2~2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=7236297aee8c0ef1b2e6c806725486b24ef16dc1;p=platform%2Fkernel%2Fu-boot.git

imx: mx6sx: select OSC as uart's clk parent

As M4 is sourcing UART clk from OSC, to make UART work
when M4 is enabled, need to select OSC as clk parent,
24M OSC is enough for debug UART in uboot.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
---

diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
index e87a215..48eaa84 100644
--- a/arch/arm/mach-imx/mx6/soc.c
+++ b/arch/arm/mach-imx/mx6/soc.c
@@ -379,6 +379,8 @@ static void set_preclk_from_osc(void)
 
 int arch_cpu_init(void)
 {
+	struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
 	init_aips();
 
 	/* Need to clear MMDC_CHx_MASK to make warm reset work. */
@@ -448,6 +450,9 @@ int arch_cpu_init(void)
 
 	imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */
 
+	if (is_mx6sx())
+		setbits_le32(&ccm->cscdr1, MXC_CCM_CSCDR1_UART_CLK_SEL);
+
 	init_src();
 
 	return 0;