From: Chaotian Jing Date: Sat, 29 Sep 2018 02:29:54 +0000 (+0800) Subject: mmc: dt-bindings: add "bus-clk" for MT2712 X-Git-Tag: v5.15~7810^2~42 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=716b717ac07de239c6ad7bd3c38f2ef979280595;p=platform%2Fkernel%2Flinux-starfive.git mmc: dt-bindings: add "bus-clk" for MT2712 On MT2712 MSDC0/3, HCLK/bus-clk need gate/ungate together, or will hang when access MSDC register. Signed-off-by: Chaotian Jing Signed-off-by: Ulf Hansson --- diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt index f33467a..f2208f4 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt @@ -22,6 +22,7 @@ Required properties: "source" - source clock (required) "hclk" - HCLK which used for host (required) "source_cg" - independent source clock gate (required for MT2712) + "bus_clk" - bus clock used for internal register access (required for MT2712 MSDC0/3) - pinctrl-names: should be "default", "state_uhs" - pinctrl-0: should contain default/high speed pin ctrl - pinctrl-1: should contain uhs mode pin ctrl