From: Parshuram Thombare Date: Sat, 10 Apr 2021 18:15:08 +0000 (+0200) Subject: dt-bindings: drm/bridge: MHDP8546 bridge binding changes for HDCP X-Git-Tag: accepted/tizen/unified/20230118.172025~6402^2~28^2~593 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=7169d082e7e623209081318abc26b0d899a4e63f;p=platform%2Fkernel%2Flinux-rpi.git dt-bindings: drm/bridge: MHDP8546 bridge binding changes for HDCP Add binding changes for HDCP in the MHDP8546 DPI/DP bridge binding. Signed-off-by: Parshuram Thombare Reviewed-by: Rob Herring Signed-off-by: Robert Foss Link: https://patchwork.freedesktop.org/patch/msgid/1618078508-30466-1-git-send-email-pthombar@cadence.com --- diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml index 6342787..2333fdb 100644 --- a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml @@ -18,7 +18,7 @@ properties: reg: minItems: 1 - maxItems: 2 + maxItems: 3 items: - description: Register block of mhdptx apb registers up to PHY mapped area (AUX_CONFIG_P). @@ -26,13 +26,16 @@ properties: included in the associated PHY. - description: Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs. + - description: + Register block of mhdptx sapb registers. reg-names: minItems: 1 - maxItems: 2 + maxItems: 3 items: - const: mhdptx - const: j721e-intg + - const: mhdptx-sapb clocks: maxItems: 1 @@ -99,14 +102,18 @@ allOf: properties: reg: minItems: 2 + maxItems: 3 reg-names: minItems: 2 + maxItems: 3 else: properties: reg: - maxItems: 1 + minItems: 1 + maxItems: 2 reg-names: - maxItems: 1 + minItems: 1 + maxItems: 2 required: - compatible