From: Saleem Abdulrasool Date: Fri, 30 Jan 2015 19:35:18 +0000 (+0000) Subject: ARM: further correct .fpu directive handling X-Git-Tag: llvmorg-3.7.0-rc1~13587 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=70fe588c889ea58c9a9d1d369bb3bbf96413e365;p=platform%2Fupstream%2Fllvm.git ARM: further correct .fpu directive handling If the original FPU specification involved a restricted VFP unit (d16), ensure that we reset the functionality when we encounter a new FPU type. In particular, if the user specified vfpv3-d16, but switched to a VFPv3 (which has 32 double precision registers), we would fail to reset the D16 feature, and treat it as being equivalent to vfpv3-d16. llvm-svn: 227603 --- diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 2de0ffa..bdad759 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -9197,11 +9197,12 @@ static const struct { } FPUs[] = { {ARM::VFP, ARM::FeatureVFP2, ARM::FeatureNEON}, {ARM::VFPV2, ARM::FeatureVFP2, ARM::FeatureNEON}, - {ARM::VFPV3, ARM::FeatureVFP2 | ARM::FeatureVFP3, ARM::FeatureNEON}, + {ARM::VFPV3, ARM::FeatureVFP2 | ARM::FeatureVFP3, + ARM::FeatureNEON | ARM::FeatureD16}, {ARM::VFPV3_D16, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureD16, ARM::FeatureNEON}, {ARM::VFPV4, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4, - ARM::FeatureNEON}, + ARM::FeatureNEON | ARM::FeatureD16}, {ARM::VFPV4_D16, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4 | ARM::FeatureD16, ARM::FeatureNEON}, @@ -9210,19 +9211,20 @@ static const struct { ARM::FeatureNEON | ARM::FeatureCrypto}, {ARM::FP_ARMV8, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4 | ARM::FeatureFPARMv8, - ARM::FeatureNEON | ARM::FeatureCrypto}, - {ARM::NEON, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureNEON, 0}, + ARM::FeatureNEON | ARM::FeatureCrypto | ARM::FeatureD16}, + {ARM::NEON, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureNEON, + ARM::FeatureD16}, {ARM::NEON_VFPV4, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4 | ARM::FeatureNEON, - 0}, + ARM::FeatureD16}, {ARM::NEON_FP_ARMV8, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4 | ARM::FeatureFPARMv8 | ARM::FeatureNEON, - ARM::FeatureCrypto}, + ARM::FeatureCrypto | ARM::FeatureD16}, {ARM::CRYPTO_NEON_FP_ARMV8, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4 | ARM::FeatureFPARMv8 | ARM::FeatureNEON | ARM::FeatureCrypto, - 0}, + ARM::FeatureD16}, {ARM::SOFTVFP, 0, 0}, }; diff --git a/llvm/test/MC/ARM/pr22395-2.s b/llvm/test/MC/ARM/pr22395-2.s new file mode 100644 index 0000000..3d2a10d --- /dev/null +++ b/llvm/test/MC/ARM/pr22395-2.s @@ -0,0 +1,37 @@ +@ RUN: llvm-mc -triple armv4t-eabi -mattr +d16 -filetype asm -o - %s 2>&1 | FileCheck %s + + .text + .thumb + + .p2align 2 + + .fpu vfpv3 + vldmia r0, {d16-d31} +@ CHECK: vldmia r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31} +@ CHECK-NOT: error: register expected + + .fpu vfpv4 + vldmia r0, {d16-d31} +@ CHECK: vldmia r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31} +@ CHECK-NOT: error: register expected + + .fpu neon + vldmia r0, {d16-d31} +@ CHECK: vldmia r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31} +@ CHECK-NOT: error: register expected + + .fpu neon-vfpv4 + vldmia r0, {d16-d31} +@ CHECK: vldmia r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31} +@ CHECK-NOT: error: register expected + + .fpu neon-fp-armv8 + vldmia r0, {d16-d31} +@ CHECK: vldmia r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31} +@ CHECK-NOT: error: register expected + + .fpu crypto-neon-fp-armv8 + vldmia r0, {d16-d31} +@ CHECK: vldmia r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31} +@ CHECK-NOT: error: register expected +