From: Maciej W. Rozycki Date: Mon, 15 May 2017 12:40:50 +0000 (+0100) Subject: MIPS16e2: Add MIPS16e2 ASE GAS test infrastructure X-Git-Tag: binutils-2_29~523 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=70ab592fbae1725ac576012dd1242328e20e664a;p=platform%2Fupstream%2Fbinutils.git MIPS16e2: Add MIPS16e2 ASE GAS test infrastructure Define a new 32-bit and 64-bit MIPS16e2 test architecture and adjust existing tests now run against these architectures accordingly. gas/ * testsuite/gas/mips/mips.exp (run_dump_test_arch): Add `mips16e2@' prefix. (run_list_test_arch): Likewise. (mips16e2-32, mips16e2-64): New architectures. * testsuite/gas/mips/mips16e2-32@mips16-macro.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-macro-t.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-macro-e.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-insn-t.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-insn-e.d: New test. * testsuite/gas/mips/mips16e2-32@mips16e-64.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-sub.d: New test. * testsuite/gas/mips/mips16e2-32@mips16e-64-sub.d: New test. * testsuite/gas/mips/mips16e2@relax-swap3.d: New test. * testsuite/gas/mips/mips16-32@mips16-asmacro.d: Remove `source' tag. Add `-I$srcdir/$subdir' to `as' flags. * testsuite/gas/mips/mips16-64@mips16-asmacro.d: Likewise. * testsuite/gas/mips/mips16e2-32@mips16-macro.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-macro-t.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-macro-e.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-insn-t.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-insn-e.l: New stderr output. * testsuite/gas/mips/mips16-sub.s: Add `.set nomips16e2'. * testsuite/gas/mips/mips16e-sub.s: Likewise. * testsuite/gas/mips/mips16e-64-sub.s: Likewise. * testsuite/gas/mips/mips16-asmacro.s: Remove `.set mips32'. * testsuite/gas/mips/mips16-32@mips16-asmacro.s: New test source. * testsuite/gas/mips/mips16-64@mips16-asmacro.s: New test source. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index 00b4742..004c5f8 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,4 +1,41 @@ 2017-05-15 Maciej W. Rozycki + + * testsuite/gas/mips/mips.exp (run_dump_test_arch): Add + `mips16e2@' prefix. + (run_list_test_arch): Likewise. + (mips16e2-32, mips16e2-64): New architectures. + * testsuite/gas/mips/mips16e2-32@mips16-macro.d: New test. + * testsuite/gas/mips/mips16e2-32@mips16-macro-t.d: New test. + * testsuite/gas/mips/mips16e2-32@mips16-macro-e.d: New test. + * testsuite/gas/mips/mips16e2-32@mips16-insn-t.d: New test. + * testsuite/gas/mips/mips16e2-32@mips16-insn-e.d: New test. + * testsuite/gas/mips/mips16e2-32@mips16e-64.d: New test. + * testsuite/gas/mips/mips16e2-32@mips16-sub.d: New test. + * testsuite/gas/mips/mips16e2-32@mips16e-64-sub.d: New test. + * testsuite/gas/mips/mips16e2@relax-swap3.d: New test. + * testsuite/gas/mips/mips16-32@mips16-asmacro.d: Remove `source' + tag. Add `-I$srcdir/$subdir' to `as' flags. + * testsuite/gas/mips/mips16-64@mips16-asmacro.d: Likewise. + * testsuite/gas/mips/mips16e2-32@mips16-macro.l: New stderr + output. + * testsuite/gas/mips/mips16e2-32@mips16-macro-t.l: New stderr + output. + * testsuite/gas/mips/mips16e2-32@mips16-macro-e.l: New stderr + output. + * testsuite/gas/mips/mips16e2-32@mips16-insn-t.l: New stderr + output. + * testsuite/gas/mips/mips16e2-32@mips16-insn-e.l: New stderr + output. + * testsuite/gas/mips/mips16-sub.s: Add `.set nomips16e2'. + * testsuite/gas/mips/mips16e-sub.s: Likewise. + * testsuite/gas/mips/mips16e-64-sub.s: Likewise. + * testsuite/gas/mips/mips16-asmacro.s: Remove `.set mips32'. + * testsuite/gas/mips/mips16-32@mips16-asmacro.s: New test + source. + * testsuite/gas/mips/mips16-64@mips16-asmacro.s: New test + source. + +2017-05-15 Maciej W. Rozycki Matthew Fortune Andrew Bennett diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index c9559df..a024ee5 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -324,6 +324,9 @@ proc run_dump_test_arch { name opts arch } { set proparch [lindex [mips_arch_properties $arch 0] 0] set prefixes [list ${proparch}@ ] + if { [ string match "mips16e2*" $proparch ] } { + lappend prefixes mips16e2@ + } if { [ string match "mips16e*" $proparch ] } { lappend prefixes mips16e@ } @@ -380,6 +383,9 @@ proc run_list_test_arch { name opts arch } { set testname "MIPS $name ([concat $opts [mips_arch_displayname $arch]])" set proparch [lindex [mips_arch_properties $arch 0] 0] set prefixes [list ${proparch}@ ] + if { [ string match "mips16e2*" $proparch ] } { + lappend prefixes mips16e2@ + } if { [ string match "mips16e*" $proparch ] } { lappend prefixes mips16e@ } @@ -488,8 +494,14 @@ mips_arch_create mips16-64 64 mips16-32 {} \ { -march=mips3 -mips16 } { -mmips:4000 } mips_arch_create mips16e-32 32 mips16-32 {} \ { -march=mips32 -mips16 } { -mmips:isa32 } +mips_arch_create mips16e2-32 32 mips16e-32 {} \ + { -march=mips32r2 -mips16 -mmips16e2 } \ + { -mmips:isa32r2 } mips_arch_create mips16e-64 64 mips16-64 { mips16e-32 } \ { -march=mips64 -mips16 } { -mmips:isa64 } +mips_arch_create mips16e2-64 64 mips16e-64 { mips16e2-32 } \ + { -march=mips64r2 -mips16 -mmips16e2 } \ + { -mmips:isa64r2 } mips_arch_create micromips 64 mips64r2 {} \ { -march=mips64r2 -mmicromips } {} mips_arch_create r3000 32 mips1 {} \ diff --git a/gas/testsuite/gas/mips/mips16-32@mips16-asmacro.d b/gas/testsuite/gas/mips/mips16-32@mips16-asmacro.d index 8c50a8c..7842b08 100644 --- a/gas/testsuite/gas/mips/mips16-32@mips16-asmacro.d +++ b/gas/testsuite/gas/mips/mips16-32@mips16-asmacro.d @@ -1,7 +1,6 @@ #objdump: -d --prefix-addresses --show-raw-insn #name: MIPS16 ASMACRO instruction -#as: -32 -#source: mips16-asmacro.s +#as: -32 -I$srcdir/$subdir .*: +file format .*mips.* diff --git a/gas/testsuite/gas/mips/mips16-32@mips16-asmacro.s b/gas/testsuite/gas/mips/mips16-32@mips16-asmacro.s new file mode 100644 index 0000000..083e528 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-32@mips16-asmacro.s @@ -0,0 +1,2 @@ + .set mips32 + .include "mips16-asmacro.s" diff --git a/gas/testsuite/gas/mips/mips16-64@mips16-asmacro.d b/gas/testsuite/gas/mips/mips16-64@mips16-asmacro.d index 466f411..c9f48ce 100644 --- a/gas/testsuite/gas/mips/mips16-64@mips16-asmacro.d +++ b/gas/testsuite/gas/mips/mips16-64@mips16-asmacro.d @@ -1,7 +1,6 @@ #objdump: -d --prefix-addresses --show-raw-insn #name: MIPS16 ASMACRO instruction -#as: -32 -#source: mips16-asmacro.s +#as: -32 -I$srcdir/$subdir .*: +file format .*mips.* diff --git a/gas/testsuite/gas/mips/mips16-64@mips16-asmacro.s b/gas/testsuite/gas/mips/mips16-64@mips16-asmacro.s new file mode 100644 index 0000000..2780c9c --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-64@mips16-asmacro.s @@ -0,0 +1,2 @@ + .set mips64 + .include "mips16-asmacro.s" diff --git a/gas/testsuite/gas/mips/mips16-asmacro.s b/gas/testsuite/gas/mips/mips16-asmacro.s index 18d0ce1..0b27d53 100644 --- a/gas/testsuite/gas/mips/mips16-asmacro.s +++ b/gas/testsuite/gas/mips/mips16-asmacro.s @@ -1,4 +1,3 @@ - .set mips32 .set mips16 foo: asmacro 0, 0, 0, 0, 0, 0 diff --git a/gas/testsuite/gas/mips/mips16-sub.s b/gas/testsuite/gas/mips/mips16-sub.s index fa44e00..e8c7924 100644 --- a/gas/testsuite/gas/mips/mips16-sub.s +++ b/gas/testsuite/gas/mips/mips16-sub.s @@ -1,2 +1,3 @@ + .set nomips16e2 .set mips3 .include "mips16.s" diff --git a/gas/testsuite/gas/mips/mips16e-64-sub.s b/gas/testsuite/gas/mips/mips16e-64-sub.s index 43dd8df..1764ef7 100644 --- a/gas/testsuite/gas/mips/mips16e-64-sub.s +++ b/gas/testsuite/gas/mips/mips16e-64-sub.s @@ -1,2 +1,3 @@ + .set nomips16e2 .set mips64 .include "mips16e-64.s" diff --git a/gas/testsuite/gas/mips/mips16e-sub.s b/gas/testsuite/gas/mips/mips16e-sub.s index 026d59a..806ee9a 100644 --- a/gas/testsuite/gas/mips/mips16e-sub.s +++ b/gas/testsuite/gas/mips/mips16e-sub.s @@ -1,2 +1,3 @@ + .set nomips16e2 .set mips32 .include "mips16e.s" diff --git a/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.d b/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.d new file mode 100644 index 0000000..7df2bf7 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.d @@ -0,0 +1,4 @@ +#as: -32 +#name: MIPS16 explicit extended instructions +#error-output: mips16e2-32@mips16-insn-e.l +#source: mips16-insn-e.s diff --git a/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.l b/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.l new file mode 100644 index 0000000..474110c --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.l @@ -0,0 +1,131 @@ +.*: Assembler messages: +.*:4: Warning: extended operand requested but not required +.*:5: Warning: extended operand requested but not required +.*:8: Warning: extended operand requested but not required +.*:9: Warning: extended operand requested but not required +.*:23: Warning: extended operand requested but not required +.*:24: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsll\.e \$16,\$16,8' +.*:25: Warning: extended operand requested but not required +.*:26: Warning: extended operand requested but not required +.*:28: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.e \$16,0\(\$16\)' +.*:30: Warning: extended operand requested but not required +.*:31: Warning: extended operand requested but not required +.*:32: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$16,\$16,0' +.*:33: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$16,\$16,0' +.*:35: Warning: extended operand requested but not required +.*:36: Warning: extended operand requested but not required +.*:38: Warning: extended operand requested but not required +.*:39: Warning: extended operand requested but not required +.*:41: Warning: extended operand requested but not required +.*:42: Warning: extended operand requested but not required +.*:46: Warning: extended operand requested but not required +.*:47: Warning: extended operand requested but not required +.*:48: Warning: extended operand requested but not required +.*:49: Warning: extended operand requested but not required +.*:50: Warning: extended operand requested but not required +.*:53: Error: unrecognized extended version of MIPS16 opcode `nop\.e ' +.*:54: Error: unrecognized extended version of MIPS16 opcode `move\.e \$0,\$16' +.*:55: Error: unrecognized extended version of MIPS16 opcode `move\.e \$16,\$0' +.*:57: Warning: extended operand requested but not required +.*:59: Warning: extended operand requested but not required +.*:60: Warning: extended operand requested but not required +.*:62: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `sd\.e \$16,0\(\$16\)' +.*:64: Warning: extended operand requested but not required +.*:66: Warning: extended operand requested but not required +.*:68: Warning: extended operand requested but not required +.*:70: Warning: extended operand requested but not required +.*:72: Warning: extended operand requested but not required +.*:74: Warning: extended operand requested but not required +.*:77: Warning: extended operand requested but not required +.*:80: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `lwu\.e \$16,0\(\$16\)' +.*:82: Warning: extended operand requested but not required +.*:84: Warning: extended operand requested but not required +.*:86: Warning: extended operand requested but not required +.*:88: Warning: extended operand requested but not required +.*:90: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$16,\$16,\$16' +.*:91: Error: operand 3 must be an immediate expression `addu\.e \$16,\$16,\$16' +.*:92: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.e \$16,\$16,\$16' +.*:93: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$16,\$16,\$16' +.*:95: Error: unrecognized extended version of MIPS16 opcode `jr\.e \$16' +.*:97: Error: unrecognized extended version of MIPS16 opcode `j\.e \$16' +.*:99: Error: unrecognized extended version of MIPS16 opcode `jr\.e \$31' +.*:101: Error: unrecognized extended version of MIPS16 opcode `j\.e \$31' +.*:103: Error: unrecognized extended version of MIPS16 opcode `jalr\.e \$16' +.*:105: Error: unrecognized extended version of MIPS16 opcode `jalr\.e \$31,\$16' +.*:107: Error: operand 1 must be an immediate expression `jal\.e \$16' +.*:109: Error: operand 1 must be an immediate expression `jal\.e \$31,\$16' +.*:111: Error: unrecognized extended version of MIPS16 opcode `jrc\.e \$16' +.*:112: Error: unrecognized extended version of MIPS16 opcode `jrc\.e \$31' +.*:113: Error: unrecognized extended version of MIPS16 opcode `jalrc\.e \$16' +.*:114: Error: unrecognized extended version of MIPS16 opcode `jalrc\.e \$31,\$16' +.*:115: Error: unrecognized extended version of MIPS16 opcode `sdbbp\.e 0' +.*:116: Error: operand 2 must be an immediate expression `slt\.e \$16,\$16' +.*:117: Error: operand 2 must be an immediate expression `sltu\.e \$16,\$16' +.*:118: Error: unrecognized extended version of MIPS16 opcode `sllv\.e \$16,\$16' +.*:119: Error: operand 2 must be an immediate expression `sll\.e \$16,\$16' +.*:120: Error: unrecognized extended version of MIPS16 opcode `break\.e 0' +.*:121: Error: unrecognized extended version of MIPS16 opcode `srlv\.e \$16,\$16' +.*:122: Error: operand 2 must be an immediate expression `srl\.e \$16,\$16' +.*:123: Error: unrecognized extended version of MIPS16 opcode `srav\.e \$16,\$16' +.*:124: Error: operand 2 must be an immediate expression `sra\.e \$16,\$16' +.*:125: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsrl\.e \$16,8' +.*:126: Error: unrecognized extended version of MIPS16 opcode `entry\.e ' +.*:127: Error: unrecognized extended version of MIPS16 opcode `entry\.e \$31' +.*:128: Error: unrecognized extended version of MIPS16 opcode `exit\.e \$f0' +.*:129: Error: unrecognized extended version of MIPS16 opcode `exit\.e' +.*:130: Error: operand 2 must be an immediate expression `cmp\.e \$16,\$16' +.*:131: Error: unrecognized extended version of MIPS16 opcode `neg\.e \$16,\$16' +.*:132: Error: unrecognized extended version of MIPS16 opcode `and\.e \$16,\$16' +.*:133: Error: unrecognized extended version of MIPS16 opcode `or\.e \$16,\$16' +.*:134: Error: unrecognized extended version of MIPS16 opcode `xor\.e \$16,\$16' +.*:135: Error: unrecognized extended version of MIPS16 opcode `not\.e \$16,\$16' +.*:136: Error: unrecognized extended version of MIPS16 opcode `mfhi\.e \$16' +.*:137: Error: unrecognized extended version of MIPS16 opcode `zeb\.e \$16' +.*:138: Error: unrecognized extended version of MIPS16 opcode `zeh\.e \$16' +.*:139: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `zew\.e \$16' +.*:140: Error: unrecognized extended version of MIPS16 opcode `seb\.e \$16' +.*:141: Error: unrecognized extended version of MIPS16 opcode `seh\.e \$16' +.*:142: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `sew\.e \$16' +.*:143: Error: unrecognized extended version of MIPS16 opcode `mflo\.e \$16' +.*:144: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsra\.e \$16,8' +.*:145: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsllv\.e \$16,\$16' +.*:146: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsll\.e \$16,\$16' +.*:147: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsrlv\.e \$16,\$16' +.*:148: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsrl\.e \$16,\$16' +.*:149: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsrav\.e \$16,\$16' +.*:150: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsra\.e \$16,\$16' +.*:151: Error: unrecognized extended version of MIPS16 opcode `mult\.e \$16,\$16' +.*:152: Error: unrecognized extended version of MIPS16 opcode `multu\.e \$16,\$16' +.*:153: Error: unrecognized extended version of MIPS16 opcode `div\.e \$0,\$16,\$16' +.*:154: Error: unrecognized extended version of MIPS16 opcode `rem\.e \$0,\$16,\$16' +.*:155: Error: unrecognized extended version of MIPS16 opcode `divu\.e \$0,\$16,\$16' +.*:156: Error: unrecognized extended version of MIPS16 opcode `remu\.e \$0,\$16,\$16' +.*:157: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dmult\.e \$16,\$16' +.*:158: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dmultu\.e \$16,\$16' +.*:159: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddiv\.e \$0,\$16,\$16' +.*:160: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `drem\.e \$0,\$16,\$16' +.*:161: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddivu\.e \$0,\$16,\$16' +.*:162: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dremu\.e \$0,\$16,\$16' +.*:164: Error: unrecognized extended version of MIPS16 opcode `extend\.e 0' +.*:166: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.e \$16,0\(\$29\)' +.*:167: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `sd\.e \$16,0\(\$29\)' +.*:168: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `sd\.e \$31,0\(\$29\)' +.*:169: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$29,0' +.*:170: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$29,\$29,0' +.*:171: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$29,0' +.*:172: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$29,\$29,0' +.*:174: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.e \$16,0\(\$pc\)' +.*:175: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.e \$16,\.-3' +.*:176: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$16,0' +.*:177: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$16,0' +.*:179: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$16,\$pc,0' +.*:180: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$16,\$pc,0' +.*:181: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dla\.e \$16,\.-1' +.*:182: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$16,\$sp,0' +.*:183: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$16,\$sp,0' +.*:10: Warning: extended operand requested but not required +.*:12: Warning: extended operand requested but not required +.*:19: Warning: extended operand requested but not required +.*:21: Warning: extended operand requested but not required +.*:44: Warning: extended operand requested but not required +.*:45: Warning: extended operand requested but not required diff --git a/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.d b/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.d new file mode 100644 index 0000000..4c08d73 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.d @@ -0,0 +1,4 @@ +#as: -32 +#name: MIPS16 explicit unextended instructions +#error-output: mips16e2-32@mips16-insn-t.l +#source: mips16-insn-t.s diff --git a/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.l b/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.l new file mode 100644 index 0000000..0fd848d --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.l @@ -0,0 +1,43 @@ +.*: Assembler messages: +.*:14: Error: invalid operands `jal\.t 0' +.*:16: Error: unrecognized unextended version of MIPS16 opcode `jalx\.t 0' +.*:24: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsll\.t \$16,\$16,8' +.*:28: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.t \$16,0\(\$16\)' +.*:32: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$16,\$16,0' +.*:33: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$16,\$16,0' +.*:62: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `sd\.t \$16,0\(\$16\)' +.*:80: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `lwu\.t \$16,0\(\$16\)' +.*:90: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$16,\$16,\$16' +.*:92: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.t \$16,\$16,\$16' +.*:125: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsrl\.t \$16,8' +.*:139: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `zew\.t \$16' +.*:142: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `sew\.t \$16' +.*:144: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsra\.t \$16,8' +.*:145: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsllv\.t \$16,\$16' +.*:146: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsll\.t \$16,\$16' +.*:147: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsrlv\.t \$16,\$16' +.*:148: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsrl\.t \$16,\$16' +.*:149: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsrav\.t \$16,\$16' +.*:150: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsra\.t \$16,\$16' +.*:157: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dmult\.t \$16,\$16' +.*:158: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dmultu\.t \$16,\$16' +.*:159: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddiv\.t \$0,\$16,\$16' +.*:160: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `drem\.t \$0,\$16,\$16' +.*:161: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddivu\.t \$0,\$16,\$16' +.*:162: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dremu\.t \$0,\$16,\$16' +.*:166: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.t \$16,0\(\$29\)' +.*:167: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `sd\.t \$16,0\(\$29\)' +.*:168: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `sd\.t \$31,0\(\$29\)' +.*:169: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$29,0' +.*:170: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$29,\$29,0' +.*:171: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$29,0' +.*:172: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$29,\$29,0' +.*:174: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.t \$16,0\(\$pc\)' +.*:175: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.t \$16,\.-3' +.*:176: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$16,0' +.*:177: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$16,0' +.*:179: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$16,\$pc,0' +.*:180: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$16,\$pc,0' +.*:181: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dla\.t \$16,\.-1' +.*:182: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$16,\$sp,0' +.*:183: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$16,\$sp,0' diff --git a/gas/testsuite/gas/mips/mips16e2-32@mips16-macro-e.d b/gas/testsuite/gas/mips/mips16e2-32@mips16-macro-e.d new file mode 100644 index 0000000..0d5d7fa --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e2-32@mips16-macro-e.d @@ -0,0 +1,4 @@ +#as: -32 +#name: MIPS16 explicit extended macros +#source: mips16-macro-e.s +#error-output: mips16e2-32@mips16-macro-e.l diff --git a/gas/testsuite/gas/mips/mips16e2-32@mips16-macro-e.l b/gas/testsuite/gas/mips/mips16e2-32@mips16-macro-e.l new file mode 100644 index 0000000..c871f07 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e2-32@mips16-macro-e.l @@ -0,0 +1,56 @@ +.*: Assembler messages: +.*:4: Error: unrecognized extended version of MIPS16 opcode `div\.e \$2,\$3,\$4' +.*:5: Error: unrecognized extended version of MIPS16 opcode `divu\.e \$3,\$4,\$5' +.*:6: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddiv\.e \$4,\$5,\$6' +.*:7: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddivu\.e \$5,\$6,\$7' +.*:8: Error: unrecognized extended version of MIPS16 opcode `rem\.e \$6,\$7,\$16' +.*:9: Error: unrecognized extended version of MIPS16 opcode `remu\.e \$6,\$7,\$17' +.*:10: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `drem\.e \$2,\$3,\$4' +.*:11: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dremu\.e \$3,\$4,\$5' +.*:12: Error: unrecognized extended version of MIPS16 opcode `mul\.e \$4,\$5,\$6' +.*:13: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dmul\.e \$5,\$6,\$7' +.*:14: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$2,-32767' +.*:15: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$3,16' +.*:16: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$4,32768' +.*:17: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$3,\$7,-16383' +.*:18: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$4,\$16,4' +.*:19: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$5,\$17,16384' +.*:20: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.e \$4,-32767' +.*:21: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.e \$6,6' +.*:22: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.e \$7,32768' +.*:23: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.e \$2,\$4,-16383' +.*:24: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.e \$3,\$7,8' +.*:25: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.e \$4,\$5,16384' +.*:26: Error: unrecognized extended version of MIPS16 opcode `beq\.e \$2,\$3,1b' +.*:27: Error: unrecognized extended version of MIPS16 opcode `bne\.e \$4,\$5,1b' +.*:28: Error: unrecognized extended version of MIPS16 opcode `blt\.e \$6,\$7,1b' +.*:29: Error: unrecognized extended version of MIPS16 opcode `bltu\.e \$16,\$17,1b' +.*:30: Error: unrecognized extended version of MIPS16 opcode `ble\.e \$4,\$7,1b' +.*:31: Error: unrecognized extended version of MIPS16 opcode `bleu\.e \$5,\$6,1b' +.*:32: Error: unrecognized extended version of MIPS16 opcode `bge\.e \$4,\$16,1b' +.*:33: Error: unrecognized extended version of MIPS16 opcode `bgeu\.e \$5,\$17,1b' +.*:34: Error: unrecognized extended version of MIPS16 opcode `bgt\.e \$4,\$6,1b' +.*:35: Error: unrecognized extended version of MIPS16 opcode `bgtu\.e \$5,\$7,1b' +.*:36: Error: unrecognized extended version of MIPS16 opcode `beq\.e \$2,1,1b' +.*:37: Error: unrecognized extended version of MIPS16 opcode `beq\.e \$3,65535,1b' +.*:38: Error: unrecognized extended version of MIPS16 opcode `bne\.e \$4,1,1b' +.*:39: Error: unrecognized extended version of MIPS16 opcode `bne\.e \$5,65535,1b' +.*:40: Error: unrecognized extended version of MIPS16 opcode `blt\.e \$6,-32768,1b' +.*:41: Error: unrecognized extended version of MIPS16 opcode `blt\.e \$7,32767,1b' +.*:42: Error: unrecognized extended version of MIPS16 opcode `bltu\.e \$16,-32768,1b' +.*:43: Error: unrecognized extended version of MIPS16 opcode `bltu\.e \$17,32767,1b' +.*:44: Error: unrecognized extended version of MIPS16 opcode `ble\.e \$2,-32769,1b' +.*:45: Error: unrecognized extended version of MIPS16 opcode `ble\.e \$3,32766,1b' +.*:46: Error: unrecognized extended version of MIPS16 opcode `bleu\.e \$4,-32769,1b' +.*:47: Error: unrecognized extended version of MIPS16 opcode `bleu\.e \$5,32766,1b' +.*:48: Error: unrecognized extended version of MIPS16 opcode `bge\.e \$6,-32768,1b' +.*:49: Error: unrecognized extended version of MIPS16 opcode `bge\.e \$7,32766,1b' +.*:50: Error: unrecognized extended version of MIPS16 opcode `bgeu\.e \$16,-32768,1b' +.*:51: Error: unrecognized extended version of MIPS16 opcode `bgeu\.e \$17,32767,1b' +.*:52: Error: unrecognized extended version of MIPS16 opcode `bgt\.e \$2,-32769,1b' +.*:53: Error: unrecognized extended version of MIPS16 opcode `bgt\.e \$3,32766,1b' +.*:54: Error: unrecognized extended version of MIPS16 opcode `bgtu\.e \$4,-32769,1b' +.*:55: Error: unrecognized extended version of MIPS16 opcode `bgtu\.e \$5,32766,1b' +.*:56: Error: unrecognized extended version of MIPS16 opcode `abs\.e \$2' +.*:57: Error: unrecognized extended version of MIPS16 opcode `abs\.e \$3,\$3' +.*:58: Error: unrecognized extended version of MIPS16 opcode `abs\.e \$4,\$5' diff --git a/gas/testsuite/gas/mips/mips16e2-32@mips16-macro-t.d b/gas/testsuite/gas/mips/mips16e2-32@mips16-macro-t.d new file mode 100644 index 0000000..204c34b --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e2-32@mips16-macro-t.d @@ -0,0 +1,4 @@ +#as: -32 +#name: MIPS16 explicit unextended macros +#source: mips16-macro-t.s +#error-output: mips16e2-32@mips16-macro-t.l diff --git a/gas/testsuite/gas/mips/mips16e2-32@mips16-macro-t.l b/gas/testsuite/gas/mips/mips16e2-32@mips16-macro-t.l new file mode 100644 index 0000000..c859519 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e2-32@mips16-macro-t.l @@ -0,0 +1,56 @@ +.*: Assembler messages: +.*:4: Error: invalid operands `div\.t \$2,\$3,\$4' +.*:5: Error: invalid operands `divu\.t \$3,\$4,\$5' +.*:6: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddiv\.t \$4,\$5,\$6' +.*:7: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddivu\.t \$5,\$6,\$7' +.*:8: Error: invalid operands `rem\.t \$6,\$7,\$16' +.*:9: Error: invalid operands `remu\.t \$6,\$7,\$17' +.*:10: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `drem\.t \$2,\$3,\$4' +.*:11: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dremu\.t \$3,\$4,\$5' +.*:12: Error: unrecognized unextended version of MIPS16 opcode `mul\.t \$4,\$5,\$6' +.*:13: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dmul\.t \$5,\$6,\$7' +.*:14: Error: invalid operands `subu\.t \$2,-32767' +.*:15: Error: invalid operands `subu\.t \$3,16' +.*:16: Error: invalid operands `subu\.t \$4,32768' +.*:17: Error: invalid operands `subu\.t \$3,\$7,-16383' +.*:18: Error: invalid operands `subu\.t \$4,\$16,4' +.*:19: Error: invalid operands `subu\.t \$5,\$17,16384' +.*:20: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.t \$4,-32767' +.*:21: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.t \$6,6' +.*:22: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.t \$7,32768' +.*:23: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.t \$2,\$4,-16383' +.*:24: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.t \$3,\$7,8' +.*:25: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.t \$4,\$5,16384' +.*:26: Error: unrecognized unextended version of MIPS16 opcode `beq\.t \$2,\$3,1b' +.*:27: Error: unrecognized unextended version of MIPS16 opcode `bne\.t \$4,\$5,1b' +.*:28: Error: unrecognized unextended version of MIPS16 opcode `blt\.t \$6,\$7,1b' +.*:29: Error: unrecognized unextended version of MIPS16 opcode `bltu\.t \$16,\$17,1b' +.*:30: Error: unrecognized unextended version of MIPS16 opcode `ble\.t \$4,\$7,1b' +.*:31: Error: unrecognized unextended version of MIPS16 opcode `bleu\.t \$5,\$6,1b' +.*:32: Error: unrecognized unextended version of MIPS16 opcode `bge\.t \$4,\$16,1b' +.*:33: Error: unrecognized unextended version of MIPS16 opcode `bgeu\.t \$5,\$17,1b' +.*:34: Error: unrecognized unextended version of MIPS16 opcode `bgt\.t \$4,\$6,1b' +.*:35: Error: unrecognized unextended version of MIPS16 opcode `bgtu\.t \$5,\$7,1b' +.*:36: Error: unrecognized unextended version of MIPS16 opcode `beq\.t \$2,1,1b' +.*:37: Error: unrecognized unextended version of MIPS16 opcode `beq\.t \$3,65535,1b' +.*:38: Error: unrecognized unextended version of MIPS16 opcode `bne\.t \$4,1,1b' +.*:39: Error: unrecognized unextended version of MIPS16 opcode `bne\.t \$5,65535,1b' +.*:40: Error: unrecognized unextended version of MIPS16 opcode `blt\.t \$6,-32768,1b' +.*:41: Error: unrecognized unextended version of MIPS16 opcode `blt\.t \$7,32767,1b' +.*:42: Error: unrecognized unextended version of MIPS16 opcode `bltu\.t \$16,-32768,1b' +.*:43: Error: unrecognized unextended version of MIPS16 opcode `bltu\.t \$17,32767,1b' +.*:44: Error: unrecognized unextended version of MIPS16 opcode `ble\.t \$2,-32769,1b' +.*:45: Error: unrecognized unextended version of MIPS16 opcode `ble\.t \$3,32766,1b' +.*:46: Error: unrecognized unextended version of MIPS16 opcode `bleu\.t \$4,-32769,1b' +.*:47: Error: unrecognized unextended version of MIPS16 opcode `bleu\.t \$5,32766,1b' +.*:48: Error: unrecognized unextended version of MIPS16 opcode `bge\.t \$6,-32768,1b' +.*:49: Error: unrecognized unextended version of MIPS16 opcode `bge\.t \$7,32766,1b' +.*:50: Error: unrecognized unextended version of MIPS16 opcode `bgeu\.t \$16,-32768,1b' +.*:51: Error: unrecognized unextended version of MIPS16 opcode `bgeu\.t \$17,32767,1b' +.*:52: Error: unrecognized unextended version of MIPS16 opcode `bgt\.t \$2,-32769,1b' +.*:53: Error: unrecognized unextended version of MIPS16 opcode `bgt\.t \$3,32766,1b' +.*:54: Error: unrecognized unextended version of MIPS16 opcode `bgtu\.t \$4,-32769,1b' +.*:55: Error: unrecognized unextended version of MIPS16 opcode `bgtu\.t \$5,32766,1b' +.*:56: Error: unrecognized unextended version of MIPS16 opcode `abs\.t \$2' +.*:57: Error: unrecognized unextended version of MIPS16 opcode `abs\.t \$3,\$3' +.*:58: Error: unrecognized unextended version of MIPS16 opcode `abs\.t \$4,\$5' diff --git a/gas/testsuite/gas/mips/mips16e2-32@mips16-macro.d b/gas/testsuite/gas/mips/mips16e2-32@mips16-macro.d new file mode 100644 index 0000000..ebcb745 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e2-32@mips16-macro.d @@ -0,0 +1,5 @@ +#objdump: -dr -Mgpr-names=numeric +#as: -32 +#name: MIPS16 macros +#source: mips16-macro.s +#error-output: mips16e2-32@mips16-macro.l diff --git a/gas/testsuite/gas/mips/mips16e2-32@mips16-macro.l b/gas/testsuite/gas/mips/mips16e2-32@mips16-macro.l new file mode 100644 index 0000000..ebdf0eb --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e2-32@mips16-macro.l @@ -0,0 +1,12 @@ +.*: Assembler messages: +.*:6: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddiv \$4,\$5,\$6' +.*:7: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddivu \$5,\$6,\$7' +.*:10: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `drem \$2,\$3,\$4' +.*:11: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dremu \$3,\$4,\$5' +.*:13: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dmul \$5,\$6,\$7' +.*:20: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu \$4,-32767' +.*:21: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu \$6,6' +.*:22: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu \$7,32768' +.*:23: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu \$2,\$4,-16383' +.*:24: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu \$3,\$7,8' +.*:25: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu \$4,\$5,16384' diff --git a/gas/testsuite/gas/mips/mips16e2-32@mips16-sub.d b/gas/testsuite/gas/mips/mips16e2-32@mips16-sub.d new file mode 100644 index 0000000..78dbdf6 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e2-32@mips16-sub.d @@ -0,0 +1,5 @@ +#objdump: -dr --prefix-address --show-raw-insn +#as: -32 -I$srcdir/$subdir +#name: MIPS16 ISA subset disassembly +#source: mips16-sub.s +#dump: mips16-32@mips16-sub.d diff --git a/gas/testsuite/gas/mips/mips16e2-32@mips16e-64-sub.d b/gas/testsuite/gas/mips/mips16e2-32@mips16e-64-sub.d new file mode 100644 index 0000000..78e9cba --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e2-32@mips16e-64-sub.d @@ -0,0 +1,5 @@ +#objdump: -dr --prefix-address --show-raw-insn +#as: -32 -I$srcdir/$subdir +#name: MIPS16e 64-bit ISA subset disassembly +#source: mips16e-64-sub.s +#dump: mips16-32@mips16e-64-sub.d diff --git a/gas/testsuite/gas/mips/mips16e2-32@mips16e-64.d b/gas/testsuite/gas/mips/mips16e2-32@mips16e-64.d new file mode 100644 index 0000000..825ad41 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e2-32@mips16e-64.d @@ -0,0 +1,4 @@ +#as: -32 +#name: MIPS16e-64 +#source: mips16e-64.s +#error-output: mips16e-32@mips16e-64.l diff --git a/gas/testsuite/gas/mips/mips16e2@relax-swap3.d b/gas/testsuite/gas/mips/mips16e2@relax-swap3.d new file mode 100644 index 0000000..3a0c517 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e2@relax-swap3.d @@ -0,0 +1,19 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS relaxed macro with branch swapping +#as: -32 +#source: relax-swap3.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0 +[ ]*[0-9a-f]+: R_MIPS16_HI16 bar +[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0 +[ ]*[0-9a-f]+: R_MIPS16_LO16 bar +[0-9a-f]+ <[^>]*> eb80 jrc v1 +[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0 +[ ]*[0-9a-f]+: R_MIPS16_HI16 bar +[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0 +[ ]*[0-9a-f]+: R_MIPS16_LO16 bar +[0-9a-f]+ <[^>]*> 2300 beqz v1,[0-9a-f]+ <[^>]*> + \.\.\.