From: David Green Date: Thu, 4 Aug 2022 19:52:26 +0000 (+0100) Subject: [AArch64] Add some extra GlobalISel CCMP tests coverage. NFC X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6ff873ac8689be44c2c53b828f75d58fbd0b633d;p=platform%2Fupstream%2Fllvm.git [AArch64] Add some extra GlobalISel CCMP tests coverage. NFC --- diff --git a/llvm/test/CodeGen/AArch64/andcompare.ll b/llvm/test/CodeGen/AArch64/andcompare.ll index cd9ae9c..40924d4 100644 --- a/llvm/test/CodeGen/AArch64/andcompare.ll +++ b/llvm/test/CodeGen/AArch64/andcompare.ll @@ -1,13 +1,23 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -mtriple=aarch64-none-none-eabi -verify-machineinstrs %s -o - | FileCheck %s +; RUN: llc -mtriple=aarch64-none-none-eabi -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,SDISEL +; RUN: llc -mtriple=aarch64-none-none-eabi -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,GISEL define i32 @and_eq_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_eq_eq: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, eq -; CHECK-NEXT: cset w0, eq -; CHECK-NEXT: ret +; SDISEL-LABEL: and_eq_eq: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, eq +; SDISEL-NEXT: cset w0, eq +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_eq_eq: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, eq +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, eq +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp eq i32 %s0, %s1 %c1 = icmp eq i32 %s2, %s3 @@ -17,12 +27,21 @@ entry: } define i32 @and_eq_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_eq_ne: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, eq -; CHECK-NEXT: cset w0, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: and_eq_ne: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, eq +; SDISEL-NEXT: cset w0, ne +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_eq_ne: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, eq +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp eq i32 %s0, %s1 %c1 = icmp ne i32 %s2, %s3 @@ -32,12 +51,21 @@ entry: } define i32 @and_eq_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_eq_ult: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, eq -; CHECK-NEXT: cset w0, lo -; CHECK-NEXT: ret +; SDISEL-LABEL: and_eq_ult: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, eq +; SDISEL-NEXT: cset w0, lo +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_eq_ult: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, eq +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lo +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp eq i32 %s0, %s1 %c1 = icmp ult i32 %s2, %s3 @@ -47,12 +75,21 @@ entry: } define i32 @and_eq_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_eq_ule: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, eq -; CHECK-NEXT: cset w0, ls -; CHECK-NEXT: ret +; SDISEL-LABEL: and_eq_ule: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, eq +; SDISEL-NEXT: cset w0, ls +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_eq_ule: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, eq +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ls +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp eq i32 %s0, %s1 %c1 = icmp ule i32 %s2, %s3 @@ -62,12 +99,21 @@ entry: } define i32 @and_eq_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_eq_ugt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, eq -; CHECK-NEXT: cset w0, hi -; CHECK-NEXT: ret +; SDISEL-LABEL: and_eq_ugt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, eq +; SDISEL-NEXT: cset w0, hi +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_eq_ugt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, eq +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hi +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp eq i32 %s0, %s1 %c1 = icmp ugt i32 %s2, %s3 @@ -77,12 +123,21 @@ entry: } define i32 @and_eq_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_eq_uge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, eq -; CHECK-NEXT: cset w0, hs -; CHECK-NEXT: ret +; SDISEL-LABEL: and_eq_uge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, eq +; SDISEL-NEXT: cset w0, hs +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_eq_uge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, eq +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hs +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp eq i32 %s0, %s1 %c1 = icmp uge i32 %s2, %s3 @@ -92,12 +147,21 @@ entry: } define i32 @and_eq_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_eq_slt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, eq -; CHECK-NEXT: cset w0, lt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_eq_slt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, eq +; SDISEL-NEXT: cset w0, lt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_eq_slt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, eq +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp eq i32 %s0, %s1 %c1 = icmp slt i32 %s2, %s3 @@ -107,12 +171,21 @@ entry: } define i32 @and_eq_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_eq_sle: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, eq -; CHECK-NEXT: cset w0, le -; CHECK-NEXT: ret +; SDISEL-LABEL: and_eq_sle: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, eq +; SDISEL-NEXT: cset w0, le +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_eq_sle: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, eq +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, le +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp eq i32 %s0, %s1 %c1 = icmp sle i32 %s2, %s3 @@ -122,12 +195,21 @@ entry: } define i32 @and_eq_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_eq_sgt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, eq -; CHECK-NEXT: cset w0, gt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_eq_sgt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, eq +; SDISEL-NEXT: cset w0, gt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_eq_sgt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, eq +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, gt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp eq i32 %s0, %s1 %c1 = icmp sgt i32 %s2, %s3 @@ -137,12 +219,21 @@ entry: } define i32 @and_eq_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_eq_sge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #8, eq -; CHECK-NEXT: cset w0, ge -; CHECK-NEXT: ret +; SDISEL-LABEL: and_eq_sge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #8, eq +; SDISEL-NEXT: cset w0, ge +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_eq_sge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, eq +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ge +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp eq i32 %s0, %s1 %c1 = icmp sge i32 %s2, %s3 @@ -152,12 +243,21 @@ entry: } define i32 @and_ne_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ne_eq: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, ne -; CHECK-NEXT: cset w0, eq -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ne_eq: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, ne +; SDISEL-NEXT: cset w0, eq +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ne_eq: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ne +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, eq +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ne i32 %s0, %s1 %c1 = icmp eq i32 %s2, %s3 @@ -167,12 +267,21 @@ entry: } define i32 @and_ne_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ne_ne: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, ne -; CHECK-NEXT: cset w0, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ne_ne: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, ne +; SDISEL-NEXT: cset w0, ne +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ne_ne: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ne +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ne i32 %s0, %s1 %c1 = icmp ne i32 %s2, %s3 @@ -182,12 +291,21 @@ entry: } define i32 @and_ne_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ne_ult: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, ne -; CHECK-NEXT: cset w0, lo -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ne_ult: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, ne +; SDISEL-NEXT: cset w0, lo +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ne_ult: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ne +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lo +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ne i32 %s0, %s1 %c1 = icmp ult i32 %s2, %s3 @@ -197,12 +315,21 @@ entry: } define i32 @and_ne_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ne_ule: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, ne -; CHECK-NEXT: cset w0, ls -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ne_ule: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, ne +; SDISEL-NEXT: cset w0, ls +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ne_ule: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ne +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ls +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ne i32 %s0, %s1 %c1 = icmp ule i32 %s2, %s3 @@ -212,12 +339,21 @@ entry: } define i32 @and_ne_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ne_ugt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, ne -; CHECK-NEXT: cset w0, hi -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ne_ugt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, ne +; SDISEL-NEXT: cset w0, hi +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ne_ugt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ne +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hi +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ne i32 %s0, %s1 %c1 = icmp ugt i32 %s2, %s3 @@ -227,12 +363,21 @@ entry: } define i32 @and_ne_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ne_uge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, ne -; CHECK-NEXT: cset w0, hs -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ne_uge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, ne +; SDISEL-NEXT: cset w0, hs +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ne_uge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ne +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hs +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ne i32 %s0, %s1 %c1 = icmp uge i32 %s2, %s3 @@ -242,12 +387,21 @@ entry: } define i32 @and_ne_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ne_slt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, ne -; CHECK-NEXT: cset w0, lt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ne_slt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, ne +; SDISEL-NEXT: cset w0, lt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ne_slt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ne +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ne i32 %s0, %s1 %c1 = icmp slt i32 %s2, %s3 @@ -257,12 +411,21 @@ entry: } define i32 @and_ne_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ne_sle: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, ne -; CHECK-NEXT: cset w0, le -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ne_sle: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, ne +; SDISEL-NEXT: cset w0, le +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ne_sle: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ne +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, le +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ne i32 %s0, %s1 %c1 = icmp sle i32 %s2, %s3 @@ -272,12 +435,21 @@ entry: } define i32 @and_ne_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ne_sgt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, ne -; CHECK-NEXT: cset w0, gt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ne_sgt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, ne +; SDISEL-NEXT: cset w0, gt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ne_sgt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ne +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, gt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ne i32 %s0, %s1 %c1 = icmp sgt i32 %s2, %s3 @@ -287,12 +459,21 @@ entry: } define i32 @and_ne_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ne_sge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #8, ne -; CHECK-NEXT: cset w0, ge -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ne_sge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #8, ne +; SDISEL-NEXT: cset w0, ge +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ne_sge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ne +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ge +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ne i32 %s0, %s1 %c1 = icmp sge i32 %s2, %s3 @@ -302,12 +483,21 @@ entry: } define i32 @and_ult_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ult_eq: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, lo -; CHECK-NEXT: cset w0, eq -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ult_eq: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, lo +; SDISEL-NEXT: cset w0, eq +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ult_eq: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lo +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, eq +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ult i32 %s0, %s1 %c1 = icmp eq i32 %s2, %s3 @@ -317,12 +507,21 @@ entry: } define i32 @and_ult_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ult_ne: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, lo -; CHECK-NEXT: cset w0, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ult_ne: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, lo +; SDISEL-NEXT: cset w0, ne +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ult_ne: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lo +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ult i32 %s0, %s1 %c1 = icmp ne i32 %s2, %s3 @@ -332,12 +531,21 @@ entry: } define i32 @and_ult_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ult_ult: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, lo -; CHECK-NEXT: cset w0, lo -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ult_ult: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, lo +; SDISEL-NEXT: cset w0, lo +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ult_ult: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lo +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lo +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ult i32 %s0, %s1 %c1 = icmp ult i32 %s2, %s3 @@ -347,12 +555,21 @@ entry: } define i32 @and_ult_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ult_ule: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, lo -; CHECK-NEXT: cset w0, ls -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ult_ule: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, lo +; SDISEL-NEXT: cset w0, ls +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ult_ule: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lo +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ls +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ult i32 %s0, %s1 %c1 = icmp ule i32 %s2, %s3 @@ -362,12 +579,21 @@ entry: } define i32 @and_ult_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ult_ugt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, lo -; CHECK-NEXT: cset w0, hi -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ult_ugt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, lo +; SDISEL-NEXT: cset w0, hi +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ult_ugt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lo +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hi +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ult i32 %s0, %s1 %c1 = icmp ugt i32 %s2, %s3 @@ -377,12 +603,21 @@ entry: } define i32 @and_ult_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ult_uge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, lo -; CHECK-NEXT: cset w0, hs -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ult_uge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, lo +; SDISEL-NEXT: cset w0, hs +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ult_uge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lo +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hs +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ult i32 %s0, %s1 %c1 = icmp uge i32 %s2, %s3 @@ -392,12 +627,21 @@ entry: } define i32 @and_ult_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ult_slt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, lo -; CHECK-NEXT: cset w0, lt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ult_slt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, lo +; SDISEL-NEXT: cset w0, lt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ult_slt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lo +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ult i32 %s0, %s1 %c1 = icmp slt i32 %s2, %s3 @@ -407,12 +651,21 @@ entry: } define i32 @and_ult_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ult_sle: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, lo -; CHECK-NEXT: cset w0, le -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ult_sle: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, lo +; SDISEL-NEXT: cset w0, le +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ult_sle: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lo +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, le +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ult i32 %s0, %s1 %c1 = icmp sle i32 %s2, %s3 @@ -422,12 +675,21 @@ entry: } define i32 @and_ult_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ult_sgt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, lo -; CHECK-NEXT: cset w0, gt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ult_sgt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, lo +; SDISEL-NEXT: cset w0, gt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ult_sgt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lo +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, gt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ult i32 %s0, %s1 %c1 = icmp sgt i32 %s2, %s3 @@ -437,12 +699,21 @@ entry: } define i32 @and_ult_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ult_sge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #8, lo -; CHECK-NEXT: cset w0, ge -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ult_sge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #8, lo +; SDISEL-NEXT: cset w0, ge +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ult_sge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lo +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ge +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ult i32 %s0, %s1 %c1 = icmp sge i32 %s2, %s3 @@ -452,12 +723,21 @@ entry: } define i32 @and_ule_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ule_eq: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, ls -; CHECK-NEXT: cset w0, eq -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ule_eq: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, ls +; SDISEL-NEXT: cset w0, eq +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ule_eq: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ls +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, eq +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ule i32 %s0, %s1 %c1 = icmp eq i32 %s2, %s3 @@ -467,12 +747,21 @@ entry: } define i32 @and_ule_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ule_ne: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, ls -; CHECK-NEXT: cset w0, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ule_ne: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, ls +; SDISEL-NEXT: cset w0, ne +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ule_ne: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ls +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ule i32 %s0, %s1 %c1 = icmp ne i32 %s2, %s3 @@ -482,12 +771,21 @@ entry: } define i32 @and_ule_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ule_ult: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, ls -; CHECK-NEXT: cset w0, lo -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ule_ult: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, ls +; SDISEL-NEXT: cset w0, lo +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ule_ult: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ls +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lo +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ule i32 %s0, %s1 %c1 = icmp ult i32 %s2, %s3 @@ -497,12 +795,21 @@ entry: } define i32 @and_ule_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ule_ule: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, ls -; CHECK-NEXT: cset w0, ls -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ule_ule: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, ls +; SDISEL-NEXT: cset w0, ls +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ule_ule: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ls +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ls +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ule i32 %s0, %s1 %c1 = icmp ule i32 %s2, %s3 @@ -512,12 +819,21 @@ entry: } define i32 @and_ule_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ule_ugt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, ls -; CHECK-NEXT: cset w0, hi -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ule_ugt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, ls +; SDISEL-NEXT: cset w0, hi +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ule_ugt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ls +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hi +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ule i32 %s0, %s1 %c1 = icmp ugt i32 %s2, %s3 @@ -527,12 +843,21 @@ entry: } define i32 @and_ule_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ule_uge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, ls -; CHECK-NEXT: cset w0, hs -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ule_uge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, ls +; SDISEL-NEXT: cset w0, hs +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ule_uge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ls +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hs +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ule i32 %s0, %s1 %c1 = icmp uge i32 %s2, %s3 @@ -542,12 +867,21 @@ entry: } define i32 @and_ule_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ule_slt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, ls -; CHECK-NEXT: cset w0, lt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ule_slt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, ls +; SDISEL-NEXT: cset w0, lt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ule_slt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ls +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ule i32 %s0, %s1 %c1 = icmp slt i32 %s2, %s3 @@ -557,12 +891,21 @@ entry: } define i32 @and_ule_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ule_sle: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, ls -; CHECK-NEXT: cset w0, le -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ule_sle: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, ls +; SDISEL-NEXT: cset w0, le +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ule_sle: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ls +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, le +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ule i32 %s0, %s1 %c1 = icmp sle i32 %s2, %s3 @@ -572,12 +915,21 @@ entry: } define i32 @and_ule_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ule_sgt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, ls -; CHECK-NEXT: cset w0, gt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ule_sgt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, ls +; SDISEL-NEXT: cset w0, gt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ule_sgt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ls +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, gt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ule i32 %s0, %s1 %c1 = icmp sgt i32 %s2, %s3 @@ -587,12 +939,21 @@ entry: } define i32 @and_ule_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ule_sge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #8, ls -; CHECK-NEXT: cset w0, ge -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ule_sge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #8, ls +; SDISEL-NEXT: cset w0, ge +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ule_sge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ls +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ge +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ule i32 %s0, %s1 %c1 = icmp sge i32 %s2, %s3 @@ -602,12 +963,21 @@ entry: } define i32 @and_ugt_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ugt_eq: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, hi -; CHECK-NEXT: cset w0, eq -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ugt_eq: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, hi +; SDISEL-NEXT: cset w0, eq +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ugt_eq: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hi +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, eq +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ugt i32 %s0, %s1 %c1 = icmp eq i32 %s2, %s3 @@ -617,12 +987,21 @@ entry: } define i32 @and_ugt_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ugt_ne: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, hi -; CHECK-NEXT: cset w0, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ugt_ne: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, hi +; SDISEL-NEXT: cset w0, ne +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ugt_ne: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hi +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ugt i32 %s0, %s1 %c1 = icmp ne i32 %s2, %s3 @@ -632,12 +1011,21 @@ entry: } define i32 @and_ugt_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ugt_ult: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, hi -; CHECK-NEXT: cset w0, lo -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ugt_ult: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, hi +; SDISEL-NEXT: cset w0, lo +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ugt_ult: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hi +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lo +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ugt i32 %s0, %s1 %c1 = icmp ult i32 %s2, %s3 @@ -647,12 +1035,21 @@ entry: } define i32 @and_ugt_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ugt_ule: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, hi -; CHECK-NEXT: cset w0, ls -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ugt_ule: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, hi +; SDISEL-NEXT: cset w0, ls +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ugt_ule: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hi +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ls +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ugt i32 %s0, %s1 %c1 = icmp ule i32 %s2, %s3 @@ -662,12 +1059,21 @@ entry: } define i32 @and_ugt_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ugt_ugt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, hi -; CHECK-NEXT: cset w0, hi -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ugt_ugt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, hi +; SDISEL-NEXT: cset w0, hi +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ugt_ugt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hi +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hi +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ugt i32 %s0, %s1 %c1 = icmp ugt i32 %s2, %s3 @@ -677,12 +1083,21 @@ entry: } define i32 @and_ugt_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ugt_uge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, hi -; CHECK-NEXT: cset w0, hs -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ugt_uge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, hi +; SDISEL-NEXT: cset w0, hs +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ugt_uge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hi +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hs +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ugt i32 %s0, %s1 %c1 = icmp uge i32 %s2, %s3 @@ -692,12 +1107,21 @@ entry: } define i32 @and_ugt_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ugt_slt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, hi -; CHECK-NEXT: cset w0, lt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ugt_slt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, hi +; SDISEL-NEXT: cset w0, lt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ugt_slt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hi +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ugt i32 %s0, %s1 %c1 = icmp slt i32 %s2, %s3 @@ -707,12 +1131,21 @@ entry: } define i32 @and_ugt_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ugt_sle: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, hi -; CHECK-NEXT: cset w0, le -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ugt_sle: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, hi +; SDISEL-NEXT: cset w0, le +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ugt_sle: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hi +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, le +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ugt i32 %s0, %s1 %c1 = icmp sle i32 %s2, %s3 @@ -722,12 +1155,21 @@ entry: } define i32 @and_ugt_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ugt_sgt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, hi -; CHECK-NEXT: cset w0, gt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ugt_sgt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, hi +; SDISEL-NEXT: cset w0, gt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ugt_sgt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hi +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, gt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ugt i32 %s0, %s1 %c1 = icmp sgt i32 %s2, %s3 @@ -737,12 +1179,21 @@ entry: } define i32 @and_ugt_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_ugt_sge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #8, hi -; CHECK-NEXT: cset w0, ge -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ugt_sge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #8, hi +; SDISEL-NEXT: cset w0, ge +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ugt_sge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hi +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ge +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp ugt i32 %s0, %s1 %c1 = icmp sge i32 %s2, %s3 @@ -752,12 +1203,21 @@ entry: } define i32 @and_uge_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_uge_eq: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, hs -; CHECK-NEXT: cset w0, eq -; CHECK-NEXT: ret +; SDISEL-LABEL: and_uge_eq: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, hs +; SDISEL-NEXT: cset w0, eq +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_uge_eq: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hs +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, eq +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp uge i32 %s0, %s1 %c1 = icmp eq i32 %s2, %s3 @@ -767,12 +1227,21 @@ entry: } define i32 @and_uge_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_uge_ne: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, hs -; CHECK-NEXT: cset w0, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: and_uge_ne: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, hs +; SDISEL-NEXT: cset w0, ne +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_uge_ne: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hs +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp uge i32 %s0, %s1 %c1 = icmp ne i32 %s2, %s3 @@ -782,12 +1251,21 @@ entry: } define i32 @and_uge_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_uge_ult: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, hs -; CHECK-NEXT: cset w0, lo -; CHECK-NEXT: ret +; SDISEL-LABEL: and_uge_ult: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, hs +; SDISEL-NEXT: cset w0, lo +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_uge_ult: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hs +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lo +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp uge i32 %s0, %s1 %c1 = icmp ult i32 %s2, %s3 @@ -797,12 +1275,21 @@ entry: } define i32 @and_uge_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_uge_ule: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, hs -; CHECK-NEXT: cset w0, ls -; CHECK-NEXT: ret +; SDISEL-LABEL: and_uge_ule: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, hs +; SDISEL-NEXT: cset w0, ls +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_uge_ule: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hs +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ls +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp uge i32 %s0, %s1 %c1 = icmp ule i32 %s2, %s3 @@ -812,12 +1299,21 @@ entry: } define i32 @and_uge_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_uge_ugt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, hs -; CHECK-NEXT: cset w0, hi -; CHECK-NEXT: ret +; SDISEL-LABEL: and_uge_ugt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, hs +; SDISEL-NEXT: cset w0, hi +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_uge_ugt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hs +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hi +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp uge i32 %s0, %s1 %c1 = icmp ugt i32 %s2, %s3 @@ -827,12 +1323,21 @@ entry: } define i32 @and_uge_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_uge_uge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, hs -; CHECK-NEXT: cset w0, hs -; CHECK-NEXT: ret +; SDISEL-LABEL: and_uge_uge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, hs +; SDISEL-NEXT: cset w0, hs +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_uge_uge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hs +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hs +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp uge i32 %s0, %s1 %c1 = icmp uge i32 %s2, %s3 @@ -842,12 +1347,21 @@ entry: } define i32 @and_uge_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_uge_slt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, hs -; CHECK-NEXT: cset w0, lt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_uge_slt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, hs +; SDISEL-NEXT: cset w0, lt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_uge_slt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hs +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp uge i32 %s0, %s1 %c1 = icmp slt i32 %s2, %s3 @@ -857,12 +1371,21 @@ entry: } define i32 @and_uge_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_uge_sle: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, hs -; CHECK-NEXT: cset w0, le -; CHECK-NEXT: ret +; SDISEL-LABEL: and_uge_sle: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, hs +; SDISEL-NEXT: cset w0, le +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_uge_sle: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hs +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, le +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp uge i32 %s0, %s1 %c1 = icmp sle i32 %s2, %s3 @@ -872,12 +1395,21 @@ entry: } define i32 @and_uge_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_uge_sgt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, hs -; CHECK-NEXT: cset w0, gt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_uge_sgt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, hs +; SDISEL-NEXT: cset w0, gt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_uge_sgt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hs +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, gt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp uge i32 %s0, %s1 %c1 = icmp sgt i32 %s2, %s3 @@ -887,12 +1419,21 @@ entry: } define i32 @and_uge_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_uge_sge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #8, hs -; CHECK-NEXT: cset w0, ge -; CHECK-NEXT: ret +; SDISEL-LABEL: and_uge_sge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #8, hs +; SDISEL-NEXT: cset w0, ge +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_uge_sge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hs +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ge +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp uge i32 %s0, %s1 %c1 = icmp sge i32 %s2, %s3 @@ -902,12 +1443,21 @@ entry: } define i32 @and_slt_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_slt_eq: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, lt -; CHECK-NEXT: cset w0, eq -; CHECK-NEXT: ret +; SDISEL-LABEL: and_slt_eq: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, lt +; SDISEL-NEXT: cset w0, eq +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_slt_eq: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, eq +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp slt i32 %s0, %s1 %c1 = icmp eq i32 %s2, %s3 @@ -917,12 +1467,21 @@ entry: } define i32 @and_slt_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_slt_ne: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, lt -; CHECK-NEXT: cset w0, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: and_slt_ne: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, lt +; SDISEL-NEXT: cset w0, ne +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_slt_ne: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp slt i32 %s0, %s1 %c1 = icmp ne i32 %s2, %s3 @@ -932,12 +1491,21 @@ entry: } define i32 @and_slt_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_slt_ult: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, lt -; CHECK-NEXT: cset w0, lo -; CHECK-NEXT: ret +; SDISEL-LABEL: and_slt_ult: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, lt +; SDISEL-NEXT: cset w0, lo +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_slt_ult: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lo +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp slt i32 %s0, %s1 %c1 = icmp ult i32 %s2, %s3 @@ -947,12 +1515,21 @@ entry: } define i32 @and_slt_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_slt_ule: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, lt -; CHECK-NEXT: cset w0, ls -; CHECK-NEXT: ret +; SDISEL-LABEL: and_slt_ule: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, lt +; SDISEL-NEXT: cset w0, ls +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_slt_ule: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ls +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp slt i32 %s0, %s1 %c1 = icmp ule i32 %s2, %s3 @@ -962,12 +1539,21 @@ entry: } define i32 @and_slt_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_slt_ugt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, lt -; CHECK-NEXT: cset w0, hi -; CHECK-NEXT: ret +; SDISEL-LABEL: and_slt_ugt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, lt +; SDISEL-NEXT: cset w0, hi +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_slt_ugt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hi +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp slt i32 %s0, %s1 %c1 = icmp ugt i32 %s2, %s3 @@ -977,12 +1563,21 @@ entry: } define i32 @and_slt_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_slt_uge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, lt -; CHECK-NEXT: cset w0, hs -; CHECK-NEXT: ret +; SDISEL-LABEL: and_slt_uge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, lt +; SDISEL-NEXT: cset w0, hs +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_slt_uge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hs +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp slt i32 %s0, %s1 %c1 = icmp uge i32 %s2, %s3 @@ -992,12 +1587,21 @@ entry: } define i32 @and_slt_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_slt_slt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, lt -; CHECK-NEXT: cset w0, lt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_slt_slt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, lt +; SDISEL-NEXT: cset w0, lt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_slt_slt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp slt i32 %s0, %s1 %c1 = icmp slt i32 %s2, %s3 @@ -1007,12 +1611,21 @@ entry: } define i32 @and_slt_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_slt_sle: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, lt -; CHECK-NEXT: cset w0, le -; CHECK-NEXT: ret +; SDISEL-LABEL: and_slt_sle: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, lt +; SDISEL-NEXT: cset w0, le +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_slt_sle: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, le +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp slt i32 %s0, %s1 %c1 = icmp sle i32 %s2, %s3 @@ -1022,12 +1635,21 @@ entry: } define i32 @and_slt_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_slt_sgt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, lt -; CHECK-NEXT: cset w0, gt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_slt_sgt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, lt +; SDISEL-NEXT: cset w0, gt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_slt_sgt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, gt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp slt i32 %s0, %s1 %c1 = icmp sgt i32 %s2, %s3 @@ -1037,12 +1659,21 @@ entry: } define i32 @and_slt_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_slt_sge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #8, lt -; CHECK-NEXT: cset w0, ge -; CHECK-NEXT: ret +; SDISEL-LABEL: and_slt_sge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #8, lt +; SDISEL-NEXT: cset w0, ge +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_slt_sge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ge +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp slt i32 %s0, %s1 %c1 = icmp sge i32 %s2, %s3 @@ -1052,12 +1683,21 @@ entry: } define i32 @and_sle_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sle_eq: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, le -; CHECK-NEXT: cset w0, eq -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sle_eq: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, le +; SDISEL-NEXT: cset w0, eq +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sle_eq: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, le +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, eq +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sle i32 %s0, %s1 %c1 = icmp eq i32 %s2, %s3 @@ -1067,12 +1707,21 @@ entry: } define i32 @and_sle_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sle_ne: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, le -; CHECK-NEXT: cset w0, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sle_ne: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, le +; SDISEL-NEXT: cset w0, ne +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sle_ne: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, le +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sle i32 %s0, %s1 %c1 = icmp ne i32 %s2, %s3 @@ -1082,12 +1731,21 @@ entry: } define i32 @and_sle_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sle_ult: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, le -; CHECK-NEXT: cset w0, lo -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sle_ult: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, le +; SDISEL-NEXT: cset w0, lo +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sle_ult: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, le +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lo +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sle i32 %s0, %s1 %c1 = icmp ult i32 %s2, %s3 @@ -1097,12 +1755,21 @@ entry: } define i32 @and_sle_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sle_ule: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, le -; CHECK-NEXT: cset w0, ls -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sle_ule: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, le +; SDISEL-NEXT: cset w0, ls +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sle_ule: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, le +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ls +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sle i32 %s0, %s1 %c1 = icmp ule i32 %s2, %s3 @@ -1112,12 +1779,21 @@ entry: } define i32 @and_sle_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sle_ugt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, le -; CHECK-NEXT: cset w0, hi -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sle_ugt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, le +; SDISEL-NEXT: cset w0, hi +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sle_ugt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, le +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hi +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sle i32 %s0, %s1 %c1 = icmp ugt i32 %s2, %s3 @@ -1127,12 +1803,21 @@ entry: } define i32 @and_sle_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sle_uge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, le -; CHECK-NEXT: cset w0, hs -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sle_uge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, le +; SDISEL-NEXT: cset w0, hs +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sle_uge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, le +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hs +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sle i32 %s0, %s1 %c1 = icmp uge i32 %s2, %s3 @@ -1142,12 +1827,21 @@ entry: } define i32 @and_sle_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sle_slt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, le -; CHECK-NEXT: cset w0, lt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sle_slt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, le +; SDISEL-NEXT: cset w0, lt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sle_slt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, le +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sle i32 %s0, %s1 %c1 = icmp slt i32 %s2, %s3 @@ -1157,12 +1851,21 @@ entry: } define i32 @and_sle_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sle_sle: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, le -; CHECK-NEXT: cset w0, le -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sle_sle: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, le +; SDISEL-NEXT: cset w0, le +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sle_sle: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, le +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, le +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sle i32 %s0, %s1 %c1 = icmp sle i32 %s2, %s3 @@ -1172,12 +1875,21 @@ entry: } define i32 @and_sle_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sle_sgt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, le -; CHECK-NEXT: cset w0, gt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sle_sgt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, le +; SDISEL-NEXT: cset w0, gt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sle_sgt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, le +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, gt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sle i32 %s0, %s1 %c1 = icmp sgt i32 %s2, %s3 @@ -1187,12 +1899,21 @@ entry: } define i32 @and_sle_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sle_sge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #8, le -; CHECK-NEXT: cset w0, ge -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sle_sge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #8, le +; SDISEL-NEXT: cset w0, ge +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sle_sge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, le +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ge +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sle i32 %s0, %s1 %c1 = icmp sge i32 %s2, %s3 @@ -1202,12 +1923,21 @@ entry: } define i32 @and_sgt_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sgt_eq: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, gt -; CHECK-NEXT: cset w0, eq -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sgt_eq: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, gt +; SDISEL-NEXT: cset w0, eq +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sgt_eq: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, gt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, eq +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sgt i32 %s0, %s1 %c1 = icmp eq i32 %s2, %s3 @@ -1217,12 +1947,21 @@ entry: } define i32 @and_sgt_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sgt_ne: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, gt -; CHECK-NEXT: cset w0, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sgt_ne: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, gt +; SDISEL-NEXT: cset w0, ne +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sgt_ne: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, gt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sgt i32 %s0, %s1 %c1 = icmp ne i32 %s2, %s3 @@ -1232,12 +1971,21 @@ entry: } define i32 @and_sgt_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sgt_ult: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, gt -; CHECK-NEXT: cset w0, lo -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sgt_ult: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, gt +; SDISEL-NEXT: cset w0, lo +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sgt_ult: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, gt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lo +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sgt i32 %s0, %s1 %c1 = icmp ult i32 %s2, %s3 @@ -1247,12 +1995,21 @@ entry: } define i32 @and_sgt_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sgt_ule: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, gt -; CHECK-NEXT: cset w0, ls -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sgt_ule: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, gt +; SDISEL-NEXT: cset w0, ls +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sgt_ule: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, gt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ls +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sgt i32 %s0, %s1 %c1 = icmp ule i32 %s2, %s3 @@ -1262,12 +2019,21 @@ entry: } define i32 @and_sgt_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sgt_ugt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, gt -; CHECK-NEXT: cset w0, hi -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sgt_ugt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, gt +; SDISEL-NEXT: cset w0, hi +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sgt_ugt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, gt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hi +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sgt i32 %s0, %s1 %c1 = icmp ugt i32 %s2, %s3 @@ -1277,12 +2043,21 @@ entry: } define i32 @and_sgt_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sgt_uge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, gt -; CHECK-NEXT: cset w0, hs -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sgt_uge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, gt +; SDISEL-NEXT: cset w0, hs +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sgt_uge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, gt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hs +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sgt i32 %s0, %s1 %c1 = icmp uge i32 %s2, %s3 @@ -1292,12 +2067,21 @@ entry: } define i32 @and_sgt_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sgt_slt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, gt -; CHECK-NEXT: cset w0, lt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sgt_slt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, gt +; SDISEL-NEXT: cset w0, lt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sgt_slt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, gt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sgt i32 %s0, %s1 %c1 = icmp slt i32 %s2, %s3 @@ -1307,12 +2091,21 @@ entry: } define i32 @and_sgt_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sgt_sle: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, gt -; CHECK-NEXT: cset w0, le -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sgt_sle: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, gt +; SDISEL-NEXT: cset w0, le +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sgt_sle: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, gt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, le +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sgt i32 %s0, %s1 %c1 = icmp sle i32 %s2, %s3 @@ -1322,12 +2115,21 @@ entry: } define i32 @and_sgt_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sgt_sgt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, gt -; CHECK-NEXT: cset w0, gt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sgt_sgt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, gt +; SDISEL-NEXT: cset w0, gt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sgt_sgt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, gt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, gt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sgt i32 %s0, %s1 %c1 = icmp sgt i32 %s2, %s3 @@ -1337,12 +2139,21 @@ entry: } define i32 @and_sgt_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sgt_sge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #8, gt -; CHECK-NEXT: cset w0, ge -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sgt_sge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #8, gt +; SDISEL-NEXT: cset w0, ge +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sgt_sge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, gt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ge +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sgt i32 %s0, %s1 %c1 = icmp sge i32 %s2, %s3 @@ -1352,12 +2163,21 @@ entry: } define i32 @and_sge_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sge_eq: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, ge -; CHECK-NEXT: cset w0, eq -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sge_eq: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, ge +; SDISEL-NEXT: cset w0, eq +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sge_eq: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ge +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, eq +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sge i32 %s0, %s1 %c1 = icmp eq i32 %s2, %s3 @@ -1367,12 +2187,21 @@ entry: } define i32 @and_sge_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sge_ne: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, ge -; CHECK-NEXT: cset w0, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sge_ne: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, ge +; SDISEL-NEXT: cset w0, ne +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sge_ne: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ge +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sge i32 %s0, %s1 %c1 = icmp ne i32 %s2, %s3 @@ -1382,12 +2211,21 @@ entry: } define i32 @and_sge_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sge_ult: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, ge -; CHECK-NEXT: cset w0, lo -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sge_ult: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, ge +; SDISEL-NEXT: cset w0, lo +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sge_ult: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ge +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lo +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sge i32 %s0, %s1 %c1 = icmp ult i32 %s2, %s3 @@ -1397,12 +2235,21 @@ entry: } define i32 @and_sge_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sge_ule: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, ge -; CHECK-NEXT: cset w0, ls -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sge_ule: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, ge +; SDISEL-NEXT: cset w0, ls +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sge_ule: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ge +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ls +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sge i32 %s0, %s1 %c1 = icmp ule i32 %s2, %s3 @@ -1412,12 +2259,21 @@ entry: } define i32 @and_sge_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sge_ugt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, ge -; CHECK-NEXT: cset w0, hi -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sge_ugt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, ge +; SDISEL-NEXT: cset w0, hi +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sge_ugt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ge +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hi +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sge i32 %s0, %s1 %c1 = icmp ugt i32 %s2, %s3 @@ -1427,12 +2283,21 @@ entry: } define i32 @and_sge_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sge_uge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, ge -; CHECK-NEXT: cset w0, hs -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sge_uge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, ge +; SDISEL-NEXT: cset w0, hs +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sge_uge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ge +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hs +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sge i32 %s0, %s1 %c1 = icmp uge i32 %s2, %s3 @@ -1442,12 +2307,21 @@ entry: } define i32 @and_sge_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sge_slt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, ge -; CHECK-NEXT: cset w0, lt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sge_slt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, ge +; SDISEL-NEXT: cset w0, lt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sge_slt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ge +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sge i32 %s0, %s1 %c1 = icmp slt i32 %s2, %s3 @@ -1457,12 +2331,21 @@ entry: } define i32 @and_sge_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sge_sle: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, ge -; CHECK-NEXT: cset w0, le -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sge_sle: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, ge +; SDISEL-NEXT: cset w0, le +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sge_sle: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ge +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, le +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sge i32 %s0, %s1 %c1 = icmp sle i32 %s2, %s3 @@ -1472,12 +2355,21 @@ entry: } define i32 @and_sge_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sge_sgt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #4, ge -; CHECK-NEXT: cset w0, gt -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sge_sgt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #4, ge +; SDISEL-NEXT: cset w0, gt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sge_sgt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ge +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, gt +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sge i32 %s0, %s1 %c1 = icmp sgt i32 %s2, %s3 @@ -1487,12 +2379,21 @@ entry: } define i32 @and_sge_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { -; CHECK-LABEL: and_sge_sge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #8, ge -; CHECK-NEXT: cset w0, ge -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sge_sge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #8, ge +; SDISEL-NEXT: cset w0, ge +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sge_sge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ge +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ge +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret entry: %c0 = icmp sge i32 %s0, %s1 %c1 = icmp sge i32 %s2, %s3 @@ -1500,3 +2401,5 @@ entry: %z = zext i1 %a to i32 ret i32 %z } +;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +; CHECK: {{.*}} diff --git a/llvm/test/CodeGen/AArch64/andorbrcompare.ll b/llvm/test/CodeGen/AArch64/andorbrcompare.ll index c6f9829..8a16d9a 100644 --- a/llvm/test/CodeGen/AArch64/andorbrcompare.ll +++ b/llvm/test/CodeGen/AArch64/andorbrcompare.ll @@ -1,22 +1,42 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -mtriple=aarch64-none-none-eabi -verify-machineinstrs %s -o - | FileCheck %s +; RUN: llc -mtriple=aarch64-none-none-eabi -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,SDISEL +; RUN: llc -mtriple=aarch64-none-none-eabi -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,GISEL declare void @dummy() define i32 @and_eq_ne_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, i32* %p) { -; CHECK-LABEL: and_eq_ne_ult: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w2, w3 -; CHECK-NEXT: ccmp w0, w1, #0, ne -; CHECK-NEXT: ccmp w4, w5, #0, ne -; CHECK-NEXT: b.hs .LBB0_2 -; CHECK-NEXT: // %bb.1: // %if -; CHECK-NEXT: mov w0, #1 -; CHECK-NEXT: str w0, [x6] -; CHECK-NEXT: ret -; CHECK-NEXT: .LBB0_2: -; CHECK-NEXT: mov w0, wzr -; CHECK-NEXT: ret +; SDISEL-LABEL: and_eq_ne_ult: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w2, w3 +; SDISEL-NEXT: ccmp w0, w1, #0, ne +; SDISEL-NEXT: ccmp w4, w5, #0, ne +; SDISEL-NEXT: b.hs .LBB0_2 +; SDISEL-NEXT: // %bb.1: // %if +; SDISEL-NEXT: mov w0, #1 +; SDISEL-NEXT: str w0, [x6] +; SDISEL-NEXT: ret +; SDISEL-NEXT: .LBB0_2: +; SDISEL-NEXT: mov w0, wzr +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_eq_ne_ult: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, eq +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: and w8, w8, w9 +; GISEL-NEXT: tbnz w8, #0, .LBB0_3 +; GISEL-NEXT: // %bb.1: // %entry +; GISEL-NEXT: mov w0, wzr +; GISEL-NEXT: cmp w4, w5 +; GISEL-NEXT: b.lo .LBB0_3 +; GISEL-NEXT: // %bb.2: // %common.ret +; GISEL-NEXT: ret +; GISEL-NEXT: .LBB0_3: // %if +; GISEL-NEXT: mov w0, #1 +; GISEL-NEXT: str w0, [x6] +; GISEL-NEXT: ret entry: %c0 = icmp eq i32 %s0, %s1 %c1 = icmp ne i32 %s2, %s3 @@ -34,19 +54,38 @@ else: } define i32 @and_ne_ult_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, i32* %p) { -; CHECK-LABEL: and_ne_ult_ule: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w2, w3 -; CHECK-NEXT: ccmp w0, w1, #4, lo -; CHECK-NEXT: ccmp w4, w5, #0, eq -; CHECK-NEXT: b.hi .LBB1_2 -; CHECK-NEXT: // %bb.1: // %if -; CHECK-NEXT: mov w0, #1 -; CHECK-NEXT: str w0, [x6] -; CHECK-NEXT: ret -; CHECK-NEXT: .LBB1_2: -; CHECK-NEXT: mov w0, wzr -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ne_ult_ule: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w2, w3 +; SDISEL-NEXT: ccmp w0, w1, #4, lo +; SDISEL-NEXT: ccmp w4, w5, #0, eq +; SDISEL-NEXT: b.hi .LBB1_2 +; SDISEL-NEXT: // %bb.1: // %if +; SDISEL-NEXT: mov w0, #1 +; SDISEL-NEXT: str w0, [x6] +; SDISEL-NEXT: ret +; SDISEL-NEXT: .LBB1_2: +; SDISEL-NEXT: mov w0, wzr +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ne_ult_ule: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ne +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lo +; GISEL-NEXT: and w8, w8, w9 +; GISEL-NEXT: tbnz w8, #0, .LBB1_3 +; GISEL-NEXT: // %bb.1: // %entry +; GISEL-NEXT: mov w0, wzr +; GISEL-NEXT: cmp w4, w5 +; GISEL-NEXT: b.ls .LBB1_3 +; GISEL-NEXT: // %bb.2: // %common.ret +; GISEL-NEXT: ret +; GISEL-NEXT: .LBB1_3: // %if +; GISEL-NEXT: mov w0, #1 +; GISEL-NEXT: str w0, [x6] +; GISEL-NEXT: ret entry: %c0 = icmp ne i32 %s0, %s1 %c1 = icmp ult i32 %s2, %s3 @@ -64,19 +103,38 @@ else: } define i32 @and_ult_ule_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, i32* %p) { -; CHECK-LABEL: and_ult_ule_ugt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w2, w3 -; CHECK-NEXT: ccmp w0, w1, #2, ls -; CHECK-NEXT: ccmp w4, w5, #2, hs -; CHECK-NEXT: b.ls .LBB2_2 -; CHECK-NEXT: // %bb.1: // %if -; CHECK-NEXT: mov w0, #1 -; CHECK-NEXT: str w0, [x6] -; CHECK-NEXT: ret -; CHECK-NEXT: .LBB2_2: -; CHECK-NEXT: mov w0, wzr -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ult_ule_ugt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w2, w3 +; SDISEL-NEXT: ccmp w0, w1, #2, ls +; SDISEL-NEXT: ccmp w4, w5, #2, hs +; SDISEL-NEXT: b.ls .LBB2_2 +; SDISEL-NEXT: // %bb.1: // %if +; SDISEL-NEXT: mov w0, #1 +; SDISEL-NEXT: str w0, [x6] +; SDISEL-NEXT: ret +; SDISEL-NEXT: .LBB2_2: +; SDISEL-NEXT: mov w0, wzr +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ult_ule_ugt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lo +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ls +; GISEL-NEXT: and w8, w8, w9 +; GISEL-NEXT: tbnz w8, #0, .LBB2_3 +; GISEL-NEXT: // %bb.1: // %entry +; GISEL-NEXT: mov w0, wzr +; GISEL-NEXT: cmp w4, w5 +; GISEL-NEXT: b.hi .LBB2_3 +; GISEL-NEXT: // %bb.2: // %common.ret +; GISEL-NEXT: ret +; GISEL-NEXT: .LBB2_3: // %if +; GISEL-NEXT: mov w0, #1 +; GISEL-NEXT: str w0, [x6] +; GISEL-NEXT: ret entry: %c0 = icmp ult i32 %s0, %s1 %c1 = icmp ule i32 %s2, %s3 @@ -94,19 +152,38 @@ else: } define i32 @and_ule_ugt_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, i32* %p) { -; CHECK-LABEL: and_ule_ugt_uge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w2, w3 -; CHECK-NEXT: ccmp w0, w1, #2, hi -; CHECK-NEXT: ccmp w4, w5, #2, hi -; CHECK-NEXT: b.lo .LBB3_2 -; CHECK-NEXT: // %bb.1: // %if -; CHECK-NEXT: mov w0, #1 -; CHECK-NEXT: str w0, [x6] -; CHECK-NEXT: ret -; CHECK-NEXT: .LBB3_2: -; CHECK-NEXT: mov w0, wzr -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ule_ugt_uge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w2, w3 +; SDISEL-NEXT: ccmp w0, w1, #2, hi +; SDISEL-NEXT: ccmp w4, w5, #2, hi +; SDISEL-NEXT: b.lo .LBB3_2 +; SDISEL-NEXT: // %bb.1: // %if +; SDISEL-NEXT: mov w0, #1 +; SDISEL-NEXT: str w0, [x6] +; SDISEL-NEXT: ret +; SDISEL-NEXT: .LBB3_2: +; SDISEL-NEXT: mov w0, wzr +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ule_ugt_uge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, ls +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hi +; GISEL-NEXT: and w8, w8, w9 +; GISEL-NEXT: tbnz w8, #0, .LBB3_3 +; GISEL-NEXT: // %bb.1: // %entry +; GISEL-NEXT: mov w0, wzr +; GISEL-NEXT: cmp w4, w5 +; GISEL-NEXT: b.hs .LBB3_3 +; GISEL-NEXT: // %bb.2: // %common.ret +; GISEL-NEXT: ret +; GISEL-NEXT: .LBB3_3: // %if +; GISEL-NEXT: mov w0, #1 +; GISEL-NEXT: str w0, [x6] +; GISEL-NEXT: ret entry: %c0 = icmp ule i32 %s0, %s1 %c1 = icmp ugt i32 %s2, %s3 @@ -124,19 +201,38 @@ else: } define i32 @and_ugt_uge_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, i32* %p) { -; CHECK-LABEL: and_ugt_uge_slt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w2, w3 -; CHECK-NEXT: ccmp w0, w1, #0, hs -; CHECK-NEXT: ccmp w4, w5, #8, ls -; CHECK-NEXT: b.ge .LBB4_2 -; CHECK-NEXT: // %bb.1: // %if -; CHECK-NEXT: mov w0, #1 -; CHECK-NEXT: str w0, [x6] -; CHECK-NEXT: ret -; CHECK-NEXT: .LBB4_2: -; CHECK-NEXT: mov w0, wzr -; CHECK-NEXT: ret +; SDISEL-LABEL: and_ugt_uge_slt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w2, w3 +; SDISEL-NEXT: ccmp w0, w1, #0, hs +; SDISEL-NEXT: ccmp w4, w5, #8, ls +; SDISEL-NEXT: b.ge .LBB4_2 +; SDISEL-NEXT: // %bb.1: // %if +; SDISEL-NEXT: mov w0, #1 +; SDISEL-NEXT: str w0, [x6] +; SDISEL-NEXT: ret +; SDISEL-NEXT: .LBB4_2: +; SDISEL-NEXT: mov w0, wzr +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_ugt_uge_slt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hi +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hs +; GISEL-NEXT: and w8, w8, w9 +; GISEL-NEXT: tbnz w8, #0, .LBB4_3 +; GISEL-NEXT: // %bb.1: // %entry +; GISEL-NEXT: mov w0, wzr +; GISEL-NEXT: cmp w4, w5 +; GISEL-NEXT: b.lt .LBB4_3 +; GISEL-NEXT: // %bb.2: // %common.ret +; GISEL-NEXT: ret +; GISEL-NEXT: .LBB4_3: // %if +; GISEL-NEXT: mov w0, #1 +; GISEL-NEXT: str w0, [x6] +; GISEL-NEXT: ret entry: %c0 = icmp ugt i32 %s0, %s1 %c1 = icmp uge i32 %s2, %s3 @@ -154,19 +250,38 @@ else: } define i32 @and_uge_slt_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, i32* %p) { -; CHECK-LABEL: and_uge_slt_sle: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w2, w3 -; CHECK-NEXT: ccmp w0, w1, #0, lt -; CHECK-NEXT: ccmp w4, w5, #4, lo -; CHECK-NEXT: b.gt .LBB5_2 -; CHECK-NEXT: // %bb.1: // %if -; CHECK-NEXT: mov w0, #1 -; CHECK-NEXT: str w0, [x6] -; CHECK-NEXT: ret -; CHECK-NEXT: .LBB5_2: -; CHECK-NEXT: mov w0, wzr -; CHECK-NEXT: ret +; SDISEL-LABEL: and_uge_slt_sle: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w2, w3 +; SDISEL-NEXT: ccmp w0, w1, #0, lt +; SDISEL-NEXT: ccmp w4, w5, #4, lo +; SDISEL-NEXT: b.gt .LBB5_2 +; SDISEL-NEXT: // %bb.1: // %if +; SDISEL-NEXT: mov w0, #1 +; SDISEL-NEXT: str w0, [x6] +; SDISEL-NEXT: ret +; SDISEL-NEXT: .LBB5_2: +; SDISEL-NEXT: mov w0, wzr +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_uge_slt_sle: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, hs +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, lt +; GISEL-NEXT: and w8, w8, w9 +; GISEL-NEXT: tbnz w8, #0, .LBB5_3 +; GISEL-NEXT: // %bb.1: // %entry +; GISEL-NEXT: mov w0, wzr +; GISEL-NEXT: cmp w4, w5 +; GISEL-NEXT: b.le .LBB5_3 +; GISEL-NEXT: // %bb.2: // %common.ret +; GISEL-NEXT: ret +; GISEL-NEXT: .LBB5_3: // %if +; GISEL-NEXT: mov w0, #1 +; GISEL-NEXT: str w0, [x6] +; GISEL-NEXT: ret entry: %c0 = icmp uge i32 %s0, %s1 %c1 = icmp slt i32 %s2, %s3 @@ -184,19 +299,38 @@ else: } define i32 @and_slt_sle_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, i32* %p) { -; CHECK-LABEL: and_slt_sle_sgt: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w2, w3 -; CHECK-NEXT: ccmp w0, w1, #0, le -; CHECK-NEXT: ccmp w4, w5, #0, ge -; CHECK-NEXT: b.le .LBB6_2 -; CHECK-NEXT: // %bb.1: // %if -; CHECK-NEXT: mov w0, #1 -; CHECK-NEXT: str w0, [x6] -; CHECK-NEXT: ret -; CHECK-NEXT: .LBB6_2: -; CHECK-NEXT: mov w0, wzr -; CHECK-NEXT: ret +; SDISEL-LABEL: and_slt_sle_sgt: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w2, w3 +; SDISEL-NEXT: ccmp w0, w1, #0, le +; SDISEL-NEXT: ccmp w4, w5, #0, ge +; SDISEL-NEXT: b.le .LBB6_2 +; SDISEL-NEXT: // %bb.1: // %if +; SDISEL-NEXT: mov w0, #1 +; SDISEL-NEXT: str w0, [x6] +; SDISEL-NEXT: ret +; SDISEL-NEXT: .LBB6_2: +; SDISEL-NEXT: mov w0, wzr +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_slt_sle_sgt: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lt +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, le +; GISEL-NEXT: and w8, w8, w9 +; GISEL-NEXT: tbnz w8, #0, .LBB6_3 +; GISEL-NEXT: // %bb.1: // %entry +; GISEL-NEXT: mov w0, wzr +; GISEL-NEXT: cmp w4, w5 +; GISEL-NEXT: b.gt .LBB6_3 +; GISEL-NEXT: // %bb.2: // %common.ret +; GISEL-NEXT: ret +; GISEL-NEXT: .LBB6_3: // %if +; GISEL-NEXT: mov w0, #1 +; GISEL-NEXT: str w0, [x6] +; GISEL-NEXT: ret entry: %c0 = icmp slt i32 %s0, %s1 %c1 = icmp sle i32 %s2, %s3 @@ -214,19 +348,38 @@ else: } define i32 @and_sle_sgt_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, i32* %p) { -; CHECK-LABEL: and_sle_sgt_sge: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: cmp w2, w3 -; CHECK-NEXT: ccmp w0, w1, #0, gt -; CHECK-NEXT: ccmp w4, w5, #0, gt -; CHECK-NEXT: b.lt .LBB7_2 -; CHECK-NEXT: // %bb.1: // %if -; CHECK-NEXT: mov w0, #1 -; CHECK-NEXT: str w0, [x6] -; CHECK-NEXT: ret -; CHECK-NEXT: .LBB7_2: -; CHECK-NEXT: mov w0, wzr -; CHECK-NEXT: ret +; SDISEL-LABEL: and_sle_sgt_sge: +; SDISEL: // %bb.0: // %entry +; SDISEL-NEXT: cmp w2, w3 +; SDISEL-NEXT: ccmp w0, w1, #0, gt +; SDISEL-NEXT: ccmp w4, w5, #0, gt +; SDISEL-NEXT: b.lt .LBB7_2 +; SDISEL-NEXT: // %bb.1: // %if +; SDISEL-NEXT: mov w0, #1 +; SDISEL-NEXT: str w0, [x6] +; SDISEL-NEXT: ret +; SDISEL-NEXT: .LBB7_2: +; SDISEL-NEXT: mov w0, wzr +; SDISEL-NEXT: ret +; +; GISEL-LABEL: and_sle_sgt_sge: +; GISEL: // %bb.0: // %entry +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, le +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, gt +; GISEL-NEXT: and w8, w8, w9 +; GISEL-NEXT: tbnz w8, #0, .LBB7_3 +; GISEL-NEXT: // %bb.1: // %entry +; GISEL-NEXT: mov w0, wzr +; GISEL-NEXT: cmp w4, w5 +; GISEL-NEXT: b.ge .LBB7_3 +; GISEL-NEXT: // %bb.2: // %common.ret +; GISEL-NEXT: ret +; GISEL-NEXT: .LBB7_3: // %if +; GISEL-NEXT: mov w0, #1 +; GISEL-NEXT: str w0, [x6] +; GISEL-NEXT: ret entry: %c0 = icmp sle i32 %s0, %s1 %c1 = icmp sgt i32 %s2, %s3 @@ -242,3 +395,5 @@ if: else: ret i32 0 } +;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +; CHECK: {{.*}} diff --git a/llvm/test/CodeGen/AArch64/arm64-ccmp.ll b/llvm/test/CodeGen/AArch64/arm64-ccmp.ll index 578a1ea..163cf55 100644 --- a/llvm/test/CodeGen/AArch64/arm64-ccmp.ll +++ b/llvm/test/CodeGen/AArch64/arm64-ccmp.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -debugify-and-strip-all-safe -mcpu=cyclone -verify-machineinstrs -aarch64-enable-ccmp -aarch64-stress-ccmp | FileCheck %s -; RUN: llc < %s -debugify-and-strip-all-safe -mcpu=cyclone -verify-machineinstrs -aarch64-enable-ccmp -aarch64-stress-ccmp -global-isel -global-isel-abort=2 | FileCheck %s --check-prefix=GISEL +; RUN: llc < %s -debugify-and-strip-all-safe -mcpu=cyclone -verify-machineinstrs -aarch64-enable-ccmp -aarch64-stress-ccmp | FileCheck %s --check-prefixes=CHECK,SDISEL +; RUN: llc < %s -debugify-and-strip-all-safe -mcpu=cyclone -verify-machineinstrs -aarch64-enable-ccmp -aarch64-stress-ccmp -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=CHECK,GISEL target triple = "arm64-apple-ios" define i32 @single_same(i32 %a, i32 %b) nounwind ssp { @@ -16,19 +16,6 @@ define i32 @single_same(i32 %a, i32 %b) nounwind ssp { ; CHECK-NEXT: LBB0_2: ; %if.end ; CHECK-NEXT: mov w0, #7 ; CHECK-NEXT: ret -; -; GISEL-LABEL: single_same: -; GISEL: ; %bb.0: ; %entry -; GISEL-NEXT: cmp w0, #5 -; GISEL-NEXT: ccmp w1, #17, #4, ne -; GISEL-NEXT: b.ne LBB0_2 -; GISEL-NEXT: ; %bb.1: ; %if.then -; GISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill -; GISEL-NEXT: bl _foo -; GISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload -; GISEL-NEXT: LBB0_2: ; %if.end -; GISEL-NEXT: mov w0, #7 -; GISEL-NEXT: ret entry: %cmp = icmp eq i32 %a, 5 %cmp1 = icmp eq i32 %b, 17 @@ -45,18 +32,18 @@ if.end: ; Different condition codes for the two compares. define i32 @single_different(i32 %a, i32 %b) nounwind ssp { -; CHECK-LABEL: single_different: -; CHECK: ; %bb.0: ; %entry -; CHECK-NEXT: cmp w0, #6 -; CHECK-NEXT: ccmp w1, #17, #0, ge -; CHECK-NEXT: b.eq LBB1_2 -; CHECK-NEXT: ; %bb.1: ; %if.then -; CHECK-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill -; CHECK-NEXT: bl _foo -; CHECK-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload -; CHECK-NEXT: LBB1_2: ; %if.end -; CHECK-NEXT: mov w0, #7 -; CHECK-NEXT: ret +; SDISEL-LABEL: single_different: +; SDISEL: ; %bb.0: ; %entry +; SDISEL-NEXT: cmp w0, #6 +; SDISEL-NEXT: ccmp w1, #17, #0, ge +; SDISEL-NEXT: b.eq LBB1_2 +; SDISEL-NEXT: ; %bb.1: ; %if.then +; SDISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill +; SDISEL-NEXT: bl _foo +; SDISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload +; SDISEL-NEXT: LBB1_2: ; %if.end +; SDISEL-NEXT: mov w0, #7 +; SDISEL-NEXT: ret ; ; GISEL-LABEL: single_different: ; GISEL: ; %bb.0: ; %entry @@ -86,23 +73,23 @@ if.end: ; Second block clobbers the flags, can't convert (easily). define i32 @single_flagclobber(i32 %a, i32 %b) nounwind ssp { -; CHECK-LABEL: single_flagclobber: -; CHECK: ; %bb.0: ; %entry -; CHECK-NEXT: cmp w0, #5 -; CHECK-NEXT: b.eq LBB2_2 -; CHECK-NEXT: ; %bb.1: ; %lor.lhs.false -; CHECK-NEXT: lsl w8, w1, #1 -; CHECK-NEXT: cmp w1, #7 -; CHECK-NEXT: csinc w8, w8, w1, lt -; CHECK-NEXT: cmp w8, #16 -; CHECK-NEXT: b.gt LBB2_3 -; CHECK-NEXT: LBB2_2: ; %if.then -; CHECK-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill -; CHECK-NEXT: bl _foo -; CHECK-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload -; CHECK-NEXT: LBB2_3: ; %if.end -; CHECK-NEXT: mov w0, #7 -; CHECK-NEXT: ret +; SDISEL-LABEL: single_flagclobber: +; SDISEL: ; %bb.0: ; %entry +; SDISEL-NEXT: cmp w0, #5 +; SDISEL-NEXT: b.eq LBB2_2 +; SDISEL-NEXT: ; %bb.1: ; %lor.lhs.false +; SDISEL-NEXT: lsl w8, w1, #1 +; SDISEL-NEXT: cmp w1, #7 +; SDISEL-NEXT: csinc w8, w8, w1, lt +; SDISEL-NEXT: cmp w8, #16 +; SDISEL-NEXT: b.gt LBB2_3 +; SDISEL-NEXT: LBB2_2: ; %if.then +; SDISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill +; SDISEL-NEXT: bl _foo +; SDISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload +; SDISEL-NEXT: LBB2_3: ; %if.end +; SDISEL-NEXT: mov w0, #7 +; SDISEL-NEXT: ret ; ; GISEL-LABEL: single_flagclobber: ; GISEL: ; %bb.0: ; %entry @@ -159,23 +146,6 @@ define i32 @single_flagclobber_tbz(i32 %a, i32 %b) nounwind ssp { ; CHECK-NEXT: LBB3_3: ; %if.end ; CHECK-NEXT: mov w0, #7 ; CHECK-NEXT: ret -; -; GISEL-LABEL: single_flagclobber_tbz: -; GISEL: ; %bb.0: ; %entry -; GISEL-NEXT: cmp w0, #5 -; GISEL-NEXT: b.eq LBB3_2 -; GISEL-NEXT: ; %bb.1: ; %lor.lhs.false -; GISEL-NEXT: lsl w8, w1, #1 -; GISEL-NEXT: cmp w1, #7 -; GISEL-NEXT: csinc w8, w8, w1, lt -; GISEL-NEXT: tbz w8, #3, LBB3_3 -; GISEL-NEXT: LBB3_2: ; %if.then -; GISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill -; GISEL-NEXT: bl _foo -; GISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload -; GISEL-NEXT: LBB3_3: ; %if.end -; GISEL-NEXT: mov w0, #7 -; GISEL-NEXT: ret entry: %cmp = icmp eq i32 %a, 5 br i1 %cmp, label %if.then, label %lor.lhs.false @@ -201,21 +171,21 @@ if.end: ; preds = %if.then, %lor.lhs.f ; The sdiv/udiv instructions do not trap when the divisor is zero, so they are ; safe to speculate. define i32 @speculate_division(i32 %a, i32 %b) nounwind ssp { -; CHECK-LABEL: speculate_division: -; CHECK: ; %bb.0: ; %entry -; CHECK-NEXT: cmp w0, #1 -; CHECK-NEXT: sdiv w8, w1, w0 -; CHECK-NEXT: ccmp w8, #16, #0, ge -; CHECK-NEXT: b.le LBB4_2 -; CHECK-NEXT: ; %bb.1: ; %if.end -; CHECK-NEXT: mov w0, #7 -; CHECK-NEXT: ret -; CHECK-NEXT: LBB4_2: ; %if.then -; CHECK-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill -; CHECK-NEXT: bl _foo -; CHECK-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload -; CHECK-NEXT: mov w0, #7 -; CHECK-NEXT: ret +; SDISEL-LABEL: speculate_division: +; SDISEL: ; %bb.0: ; %entry +; SDISEL-NEXT: cmp w0, #1 +; SDISEL-NEXT: sdiv w8, w1, w0 +; SDISEL-NEXT: ccmp w8, #16, #0, ge +; SDISEL-NEXT: b.le LBB4_2 +; SDISEL-NEXT: ; %bb.1: ; %if.end +; SDISEL-NEXT: mov w0, #7 +; SDISEL-NEXT: ret +; SDISEL-NEXT: LBB4_2: ; %if.then +; SDISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill +; SDISEL-NEXT: bl _foo +; SDISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload +; SDISEL-NEXT: mov w0, #7 +; SDISEL-NEXT: ret ; ; GISEL-LABEL: speculate_division: ; GISEL: ; %bb.0: ; %entry @@ -251,23 +221,23 @@ if.end: ; Floating point compare. define i32 @single_fcmp(i32 %a, float %b) nounwind ssp { -; CHECK-LABEL: single_fcmp: -; CHECK: ; %bb.0: ; %entry -; CHECK-NEXT: cmp w0, #1 -; CHECK-NEXT: scvtf s1, w0 -; CHECK-NEXT: fdiv s0, s0, s1 -; CHECK-NEXT: fmov s1, #17.00000000 -; CHECK-NEXT: fccmp s0, s1, #8, ge -; CHECK-NEXT: b.ge LBB5_2 -; CHECK-NEXT: ; %bb.1: ; %if.end -; CHECK-NEXT: mov w0, #7 -; CHECK-NEXT: ret -; CHECK-NEXT: LBB5_2: ; %if.then -; CHECK-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill -; CHECK-NEXT: bl _foo -; CHECK-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload -; CHECK-NEXT: mov w0, #7 -; CHECK-NEXT: ret +; SDISEL-LABEL: single_fcmp: +; SDISEL: ; %bb.0: ; %entry +; SDISEL-NEXT: cmp w0, #1 +; SDISEL-NEXT: scvtf s1, w0 +; SDISEL-NEXT: fdiv s0, s0, s1 +; SDISEL-NEXT: fmov s1, #17.00000000 +; SDISEL-NEXT: fccmp s0, s1, #8, ge +; SDISEL-NEXT: b.ge LBB5_2 +; SDISEL-NEXT: ; %bb.1: ; %if.end +; SDISEL-NEXT: mov w0, #7 +; SDISEL-NEXT: ret +; SDISEL-NEXT: LBB5_2: ; %if.then +; SDISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill +; SDISEL-NEXT: bl _foo +; SDISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload +; SDISEL-NEXT: mov w0, #7 +; SDISEL-NEXT: ret ; ; GISEL-LABEL: single_fcmp: ; GISEL: ; %bb.0: ; %entry @@ -317,18 +287,6 @@ define void @multi_different(i32 %a, i32 %b, i32 %c) nounwind ssp { ; CHECK-NEXT: ret ; CHECK-NEXT: LBB6_2: ; %if.then ; CHECK-NEXT: b _foo -; -; GISEL-LABEL: multi_different: -; GISEL: ; %bb.0: ; %entry -; GISEL-NEXT: cmp w0, w1 -; GISEL-NEXT: sdiv w8, w1, w0 -; GISEL-NEXT: ccmp w8, #5, #0, gt -; GISEL-NEXT: ccmp w8, w2, #4, eq -; GISEL-NEXT: b.gt LBB6_2 -; GISEL-NEXT: ; %bb.1: ; %if.end -; GISEL-NEXT: ret -; GISEL-NEXT: LBB6_2: ; %if.then -; GISEL-NEXT: b _foo entry: %cmp = icmp sgt i32 %a, %b br i1 %cmp, label %land.lhs.true, label %if.end @@ -362,19 +320,6 @@ define i32 @cbz_head(i32 %a, i32 %b) nounwind ssp { ; CHECK-NEXT: LBB7_2: ; %if.end ; CHECK-NEXT: mov w0, #7 ; CHECK-NEXT: ret -; -; GISEL-LABEL: cbz_head: -; GISEL: ; %bb.0: ; %entry -; GISEL-NEXT: cmp w0, #0 -; GISEL-NEXT: ccmp w1, #17, #0, ne -; GISEL-NEXT: b.eq LBB7_2 -; GISEL-NEXT: ; %bb.1: ; %if.then -; GISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill -; GISEL-NEXT: bl _foo -; GISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload -; GISEL-NEXT: LBB7_2: ; %if.end -; GISEL-NEXT: mov w0, #7 -; GISEL-NEXT: ret entry: %cmp = icmp eq i32 %a, 0 %cmp1 = icmp ne i32 %b, 17 @@ -409,23 +354,6 @@ define i32 @immediate_range(i32 %a, i32 %b) nounwind ssp { ; CHECK-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload ; CHECK-NEXT: mov w0, #7 ; CHECK-NEXT: ret -; -; GISEL-LABEL: immediate_range: -; GISEL: ; %bb.0: ; %entry -; GISEL-NEXT: cmp w0, #5 -; GISEL-NEXT: b.eq LBB8_3 -; GISEL-NEXT: ; %bb.1: ; %entry -; GISEL-NEXT: cmp w1, #32 -; GISEL-NEXT: b.eq LBB8_3 -; GISEL-NEXT: ; %bb.2: ; %if.end -; GISEL-NEXT: mov w0, #7 -; GISEL-NEXT: ret -; GISEL-NEXT: LBB8_3: ; %if.then -; GISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill -; GISEL-NEXT: bl _foo -; GISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload -; GISEL-NEXT: mov w0, #7 -; GISEL-NEXT: ret entry: %cmp = icmp eq i32 %a, 5 %cmp1 = icmp eq i32 %b, 32 @@ -454,19 +382,6 @@ define i32 @cbz_second(i32 %a, i32 %b) nounwind ssp { ; CHECK-NEXT: LBB9_2: ; %if.end ; CHECK-NEXT: mov w0, #7 ; CHECK-NEXT: ret -; -; GISEL-LABEL: cbz_second: -; GISEL: ; %bb.0: ; %entry -; GISEL-NEXT: cmp w0, #0 -; GISEL-NEXT: ccmp w1, #0, #0, ne -; GISEL-NEXT: b.eq LBB9_2 -; GISEL-NEXT: ; %bb.1: ; %if.then -; GISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill -; GISEL-NEXT: bl _foo -; GISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload -; GISEL-NEXT: LBB9_2: ; %if.end -; GISEL-NEXT: mov w0, #7 -; GISEL-NEXT: ret entry: %cmp = icmp eq i32 %a, 0 %cmp1 = icmp ne i32 %b, 0 @@ -495,19 +410,6 @@ define i32 @cbnz_second(i32 %a, i32 %b) nounwind ssp { ; CHECK-NEXT: LBB10_2: ; %if.end ; CHECK-NEXT: mov w0, #7 ; CHECK-NEXT: ret -; -; GISEL-LABEL: cbnz_second: -; GISEL: ; %bb.0: ; %entry -; GISEL-NEXT: cmp w0, #0 -; GISEL-NEXT: ccmp w1, #0, #4, ne -; GISEL-NEXT: b.ne LBB10_2 -; GISEL-NEXT: ; %bb.1: ; %if.then -; GISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill -; GISEL-NEXT: bl _foo -; GISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload -; GISEL-NEXT: LBB10_2: ; %if.end -; GISEL-NEXT: mov w0, #7 -; GISEL-NEXT: ret entry: %cmp = icmp eq i32 %a, 0 %cmp1 = icmp eq i32 %b, 0 @@ -532,10 +434,6 @@ define void @build_modify_expr() nounwind ssp { ; CHECK-LABEL: build_modify_expr: ; CHECK: ; %bb.0: ; %entry ; CHECK-NEXT: ret -; -; GISEL-LABEL: build_modify_expr: -; GISEL: ; %bb.0: ; %entry -; GISEL-NEXT: ret entry: switch i32 undef, label %sw.bb.i.i [ i32 69, label %if.end85 @@ -560,12 +458,12 @@ sw.bb.i.i: } define i64 @select_and(i32 %w0, i32 %w1, i64 %x2, i64 %x3) { -; CHECK-LABEL: select_and: -; CHECK: ; %bb.0: -; CHECK-NEXT: cmp w1, #5 -; CHECK-NEXT: ccmp w0, w1, #0, ne -; CHECK-NEXT: csel x0, x2, x3, lt -; CHECK-NEXT: ret +; SDISEL-LABEL: select_and: +; SDISEL: ; %bb.0: +; SDISEL-NEXT: cmp w1, #5 +; SDISEL-NEXT: ccmp w0, w1, #0, ne +; SDISEL-NEXT: csel x0, x2, x3, lt +; SDISEL-NEXT: ret ; ; GISEL-LABEL: select_and: ; GISEL: ; %bb.0: @@ -582,12 +480,12 @@ define i64 @select_and(i32 %w0, i32 %w1, i64 %x2, i64 %x3) { } define i64 @select_or(i32 %w0, i32 %w1, i64 %x2, i64 %x3) { -; CHECK-LABEL: select_or: -; CHECK: ; %bb.0: -; CHECK-NEXT: cmp w1, #5 -; CHECK-NEXT: ccmp w0, w1, #8, eq -; CHECK-NEXT: csel x0, x2, x3, lt -; CHECK-NEXT: ret +; SDISEL-LABEL: select_or: +; SDISEL: ; %bb.0: +; SDISEL-NEXT: cmp w1, #5 +; SDISEL-NEXT: ccmp w0, w1, #8, eq +; SDISEL-NEXT: csel x0, x2, x3, lt +; SDISEL-NEXT: ret ; ; GISEL-LABEL: select_or: ; GISEL: ; %bb.0: @@ -604,12 +502,12 @@ define i64 @select_or(i32 %w0, i32 %w1, i64 %x2, i64 %x3) { } define float @select_or_float(i32 %w0, i32 %w1, float %x2, float %x3) { -; CHECK-LABEL: select_or_float: -; CHECK: ; %bb.0: -; CHECK-NEXT: cmp w1, #5 -; CHECK-NEXT: ccmp w0, w1, #8, eq -; CHECK-NEXT: fcsel s0, s0, s1, lt -; CHECK-NEXT: ret +; SDISEL-LABEL: select_or_float: +; SDISEL: ; %bb.0: +; SDISEL-NEXT: cmp w1, #5 +; SDISEL-NEXT: ccmp w0, w1, #8, eq +; SDISEL-NEXT: fcsel s0, s0, s1, lt +; SDISEL-NEXT: ret ; ; GISEL-LABEL: select_or_float: ; GISEL: ; %bb.0: @@ -626,14 +524,14 @@ define float @select_or_float(i32 %w0, i32 %w1, float %x2, float %x3) { } define i64 @gccbug(i64 %x0, i64 %x1) { -; CHECK-LABEL: gccbug: -; CHECK: ; %bb.0: -; CHECK-NEXT: cmp x0, #2 -; CHECK-NEXT: ccmp x0, #4, #4, ne -; CHECK-NEXT: ccmp x1, #0, #0, eq -; CHECK-NEXT: mov w8, #1 -; CHECK-NEXT: cinc x0, x8, eq -; CHECK-NEXT: ret +; SDISEL-LABEL: gccbug: +; SDISEL: ; %bb.0: +; SDISEL-NEXT: cmp x0, #2 +; SDISEL-NEXT: ccmp x0, #4, #4, ne +; SDISEL-NEXT: ccmp x1, #0, #0, eq +; SDISEL-NEXT: mov w8, #1 +; SDISEL-NEXT: cinc x0, x8, eq +; SDISEL-NEXT: ret ; ; GISEL-LABEL: gccbug: ; GISEL: ; %bb.0: @@ -656,14 +554,14 @@ define i64 @gccbug(i64 %x0, i64 %x1) { } define i32 @select_ororand(i32 %w0, i32 %w1, i32 %w2, i32 %w3) { -; CHECK-LABEL: select_ororand: -; CHECK: ; %bb.0: -; CHECK-NEXT: cmp w3, #4 -; CHECK-NEXT: ccmp w2, #2, #0, gt -; CHECK-NEXT: ccmp w1, #13, #2, ge -; CHECK-NEXT: ccmp w0, #0, #4, ls -; CHECK-NEXT: csel w0, w3, wzr, eq -; CHECK-NEXT: ret +; SDISEL-LABEL: select_ororand: +; SDISEL: ; %bb.0: +; SDISEL-NEXT: cmp w3, #4 +; SDISEL-NEXT: ccmp w2, #2, #0, gt +; SDISEL-NEXT: ccmp w1, #13, #2, ge +; SDISEL-NEXT: ccmp w0, #0, #4, ls +; SDISEL-NEXT: csel w0, w3, wzr, eq +; SDISEL-NEXT: ret ; ; GISEL-LABEL: select_ororand: ; GISEL: ; %bb.0: @@ -687,13 +585,13 @@ define i32 @select_ororand(i32 %w0, i32 %w1, i32 %w2, i32 %w3) { } define i32 @select_andor(i32 %v1, i32 %v2, i32 %v3) { -; CHECK-LABEL: select_andor: -; CHECK: ; %bb.0: -; CHECK-NEXT: cmp w1, w2 -; CHECK-NEXT: ccmp w0, #0, #4, lt -; CHECK-NEXT: ccmp w0, w1, #0, eq -; CHECK-NEXT: csel w0, w0, w1, eq -; CHECK-NEXT: ret +; SDISEL-LABEL: select_andor: +; SDISEL: ; %bb.0: +; SDISEL-NEXT: cmp w1, w2 +; SDISEL-NEXT: ccmp w0, #0, #4, lt +; SDISEL-NEXT: ccmp w0, w1, #0, eq +; SDISEL-NEXT: csel w0, w0, w1, eq +; SDISEL-NEXT: ret ; ; GISEL-LABEL: select_andor: ; GISEL: ; %bb.0: @@ -712,18 +610,18 @@ define i32 @select_andor(i32 %v1, i32 %v2, i32 %v3) { } define i64 @select_noccmp1(i64 %v1, i64 %v2, i64 %v3, i64 %r) { -; CHECK-LABEL: select_noccmp1: -; CHECK: ; %bb.0: -; CHECK-NEXT: cmp x0, #0 -; CHECK-NEXT: ccmp x0, #13, #4, lt -; CHECK-NEXT: cset w8, gt -; CHECK-NEXT: cmp x2, #2 -; CHECK-NEXT: ccmp x2, #4, #4, lt -; CHECK-NEXT: cset w9, gt -; CHECK-NEXT: orr w8, w8, w9 -; CHECK-NEXT: cmp w8, #0 -; CHECK-NEXT: csel x0, xzr, x3, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: select_noccmp1: +; SDISEL: ; %bb.0: +; SDISEL-NEXT: cmp x0, #0 +; SDISEL-NEXT: ccmp x0, #13, #4, lt +; SDISEL-NEXT: cset w8, gt +; SDISEL-NEXT: cmp x2, #2 +; SDISEL-NEXT: ccmp x2, #4, #4, lt +; SDISEL-NEXT: cset w9, gt +; SDISEL-NEXT: orr w8, w8, w9 +; SDISEL-NEXT: cmp w8, #0 +; SDISEL-NEXT: csel x0, xzr, x3, ne +; SDISEL-NEXT: ret ; ; GISEL-LABEL: select_noccmp1: ; GISEL: ; %bb.0: @@ -755,17 +653,17 @@ define i64 @select_noccmp1(i64 %v1, i64 %v2, i64 %v3, i64 %r) { @g = global i32 0 define i64 @select_noccmp2(i64 %v1, i64 %v2, i64 %v3, i64 %r) { -; CHECK-LABEL: select_noccmp2: -; CHECK: ; %bb.0: -; CHECK-NEXT: cmp x0, #0 -; CHECK-NEXT: ccmp x0, #13, #0, ge -; CHECK-NEXT: cset w8, gt -; CHECK-NEXT: cmp w8, #0 -; CHECK-NEXT: csel x0, xzr, x3, ne -; CHECK-NEXT: sbfx w8, w8, #0, #1 -; CHECK-NEXT: adrp x9, _g@PAGE -; CHECK-NEXT: str w8, [x9, _g@PAGEOFF] -; CHECK-NEXT: ret +; SDISEL-LABEL: select_noccmp2: +; SDISEL: ; %bb.0: +; SDISEL-NEXT: cmp x0, #0 +; SDISEL-NEXT: ccmp x0, #13, #0, ge +; SDISEL-NEXT: cset w8, gt +; SDISEL-NEXT: cmp w8, #0 +; SDISEL-NEXT: csel x0, xzr, x3, ne +; SDISEL-NEXT: sbfx w8, w8, #0, #1 +; SDISEL-NEXT: adrp x9, _g@PAGE +; SDISEL-NEXT: str w8, [x9, _g@PAGEOFF] +; SDISEL-NEXT: ret ; ; GISEL-LABEL: select_noccmp2: ; GISEL: ; %bb.0: @@ -792,23 +690,23 @@ define i64 @select_noccmp2(i64 %v1, i64 %v2, i64 %v3, i64 %r) { ; The following is not possible to implement with a single cmp;ccmp;csel ; sequence. define i32 @select_noccmp3(i32 %v0, i32 %v1, i32 %v2) { -; CHECK-LABEL: select_noccmp3: -; CHECK: ; %bb.0: -; CHECK-NEXT: cmp w0, #0 -; CHECK-NEXT: ccmp w0, #13, #0, ge -; CHECK-NEXT: cset w8, gt -; CHECK-NEXT: cmp w0, #22 -; CHECK-NEXT: mov w9, #44 -; CHECK-NEXT: ccmp w0, w9, #0, ge -; CHECK-NEXT: cset w9, gt -; CHECK-NEXT: cmp w0, #99 -; CHECK-NEXT: and w8, w8, w9 -; CHECK-NEXT: mov w9, #77 -; CHECK-NEXT: ccmp w0, w9, #4, ne -; CHECK-NEXT: cset w9, eq -; CHECK-NEXT: tst w8, w9 -; CHECK-NEXT: csel w0, w1, w2, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: select_noccmp3: +; SDISEL: ; %bb.0: +; SDISEL-NEXT: cmp w0, #0 +; SDISEL-NEXT: ccmp w0, #13, #0, ge +; SDISEL-NEXT: cset w8, gt +; SDISEL-NEXT: cmp w0, #22 +; SDISEL-NEXT: mov w9, #44 +; SDISEL-NEXT: ccmp w0, w9, #0, ge +; SDISEL-NEXT: cset w9, gt +; SDISEL-NEXT: cmp w0, #99 +; SDISEL-NEXT: and w8, w8, w9 +; SDISEL-NEXT: mov w9, #77 +; SDISEL-NEXT: ccmp w0, w9, #4, ne +; SDISEL-NEXT: cset w9, eq +; SDISEL-NEXT: tst w8, w9 +; SDISEL-NEXT: csel w0, w1, w2, ne +; SDISEL-NEXT: ret ; ; GISEL-LABEL: select_noccmp3: ; GISEL: ; %bb.0: @@ -857,14 +755,6 @@ define i32 @select_and_olt_one(double %v0, double %v1, double %v2, double %v3, i ; CHECK-NEXT: fccmp d2, d3, #1, ne ; CHECK-NEXT: csel w0, w0, w1, vc ; CHECK-NEXT: ret -; -; GISEL-LABEL: select_and_olt_one: -; GISEL: ; %bb.0: -; GISEL-NEXT: fcmp d0, d1 -; GISEL-NEXT: fccmp d2, d3, #4, mi -; GISEL-NEXT: fccmp d2, d3, #1, ne -; GISEL-NEXT: csel w0, w0, w1, vc -; GISEL-NEXT: ret %c0 = fcmp olt double %v0, %v1 %c1 = fcmp one double %v2, %v3 %cr = and i1 %c1, %c0 @@ -880,14 +770,6 @@ define i32 @select_and_one_olt(double %v0, double %v1, double %v2, double %v3, i ; CHECK-NEXT: fccmp d2, d3, #0, vc ; CHECK-NEXT: csel w0, w0, w1, mi ; CHECK-NEXT: ret -; -; GISEL-LABEL: select_and_one_olt: -; GISEL: ; %bb.0: -; GISEL-NEXT: fcmp d0, d1 -; GISEL-NEXT: fccmp d0, d1, #1, ne -; GISEL-NEXT: fccmp d2, d3, #0, vc -; GISEL-NEXT: csel w0, w0, w1, mi -; GISEL-NEXT: ret %c0 = fcmp one double %v0, %v1 %c1 = fcmp olt double %v2, %v3 %cr = and i1 %c1, %c0 @@ -903,14 +785,6 @@ define i32 @select_and_olt_ueq(double %v0, double %v1, double %v2, double %v3, i ; CHECK-NEXT: fccmp d2, d3, #8, le ; CHECK-NEXT: csel w0, w0, w1, pl ; CHECK-NEXT: ret -; -; GISEL-LABEL: select_and_olt_ueq: -; GISEL: ; %bb.0: -; GISEL-NEXT: fcmp d0, d1 -; GISEL-NEXT: fccmp d2, d3, #0, mi -; GISEL-NEXT: fccmp d2, d3, #8, le -; GISEL-NEXT: csel w0, w0, w1, pl -; GISEL-NEXT: ret %c0 = fcmp olt double %v0, %v1 %c1 = fcmp ueq double %v2, %v3 %cr = and i1 %c1, %c0 @@ -926,14 +800,6 @@ define i32 @select_and_ueq_olt(double %v0, double %v1, double %v2, double %v3, i ; CHECK-NEXT: fccmp d2, d3, #0, pl ; CHECK-NEXT: csel w0, w0, w1, mi ; CHECK-NEXT: ret -; -; GISEL-LABEL: select_and_ueq_olt: -; GISEL: ; %bb.0: -; GISEL-NEXT: fcmp d0, d1 -; GISEL-NEXT: fccmp d0, d1, #8, le -; GISEL-NEXT: fccmp d2, d3, #0, pl -; GISEL-NEXT: csel w0, w0, w1, mi -; GISEL-NEXT: ret %c0 = fcmp ueq double %v0, %v1 %c1 = fcmp olt double %v2, %v3 %cr = and i1 %c1, %c0 @@ -949,14 +815,6 @@ define i32 @select_or_olt_one(double %v0, double %v1, double %v2, double %v3, i3 ; CHECK-NEXT: fccmp d2, d3, #8, le ; CHECK-NEXT: csel w0, w0, w1, mi ; CHECK-NEXT: ret -; -; GISEL-LABEL: select_or_olt_one: -; GISEL: ; %bb.0: -; GISEL-NEXT: fcmp d0, d1 -; GISEL-NEXT: fccmp d2, d3, #0, pl -; GISEL-NEXT: fccmp d2, d3, #8, le -; GISEL-NEXT: csel w0, w0, w1, mi -; GISEL-NEXT: ret %c0 = fcmp olt double %v0, %v1 %c1 = fcmp one double %v2, %v3 %cr = or i1 %c1, %c0 @@ -972,14 +830,6 @@ define i32 @select_or_one_olt(double %v0, double %v1, double %v2, double %v3, i3 ; CHECK-NEXT: fccmp d2, d3, #8, pl ; CHECK-NEXT: csel w0, w0, w1, mi ; CHECK-NEXT: ret -; -; GISEL-LABEL: select_or_one_olt: -; GISEL: ; %bb.0: -; GISEL-NEXT: fcmp d0, d1 -; GISEL-NEXT: fccmp d0, d1, #8, le -; GISEL-NEXT: fccmp d2, d3, #8, pl -; GISEL-NEXT: csel w0, w0, w1, mi -; GISEL-NEXT: ret %c0 = fcmp one double %v0, %v1 %c1 = fcmp olt double %v2, %v3 %cr = or i1 %c1, %c0 @@ -995,14 +845,6 @@ define i32 @select_or_olt_ueq(double %v0, double %v1, double %v2, double %v3, i3 ; CHECK-NEXT: fccmp d2, d3, #1, ne ; CHECK-NEXT: csel w0, w0, w1, vs ; CHECK-NEXT: ret -; -; GISEL-LABEL: select_or_olt_ueq: -; GISEL: ; %bb.0: -; GISEL-NEXT: fcmp d0, d1 -; GISEL-NEXT: fccmp d2, d3, #4, pl -; GISEL-NEXT: fccmp d2, d3, #1, ne -; GISEL-NEXT: csel w0, w0, w1, vs -; GISEL-NEXT: ret %c0 = fcmp olt double %v0, %v1 %c1 = fcmp ueq double %v2, %v3 %cr = or i1 %c1, %c0 @@ -1018,14 +860,6 @@ define i32 @select_or_ueq_olt(double %v0, double %v1, double %v2, double %v3, i3 ; CHECK-NEXT: fccmp d2, d3, #8, vc ; CHECK-NEXT: csel w0, w0, w1, mi ; CHECK-NEXT: ret -; -; GISEL-LABEL: select_or_ueq_olt: -; GISEL: ; %bb.0: -; GISEL-NEXT: fcmp d0, d1 -; GISEL-NEXT: fccmp d0, d1, #1, ne -; GISEL-NEXT: fccmp d2, d3, #8, vc -; GISEL-NEXT: csel w0, w0, w1, mi -; GISEL-NEXT: ret %c0 = fcmp ueq double %v0, %v1 %c1 = fcmp olt double %v2, %v3 %cr = or i1 %c1, %c0 @@ -1042,15 +876,6 @@ define i32 @select_or_olt_ogt_ueq(double %v0, double %v1, double %v2, double %v3 ; CHECK-NEXT: fccmp d4, d5, #1, ne ; CHECK-NEXT: csel w0, w0, w1, vs ; CHECK-NEXT: ret -; -; GISEL-LABEL: select_or_olt_ogt_ueq: -; GISEL: ; %bb.0: -; GISEL-NEXT: fcmp d0, d1 -; GISEL-NEXT: fccmp d2, d3, #0, pl -; GISEL-NEXT: fccmp d4, d5, #4, le -; GISEL-NEXT: fccmp d4, d5, #1, ne -; GISEL-NEXT: csel w0, w0, w1, vs -; GISEL-NEXT: ret %c0 = fcmp olt double %v0, %v1 %c1 = fcmp ogt double %v2, %v3 %c2 = fcmp ueq double %v4, %v5 @@ -1069,15 +894,6 @@ define i32 @select_or_olt_ueq_ogt(double %v0, double %v1, double %v2, double %v3 ; CHECK-NEXT: fccmp d4, d5, #0, vc ; CHECK-NEXT: csel w0, w0, w1, gt ; CHECK-NEXT: ret -; -; GISEL-LABEL: select_or_olt_ueq_ogt: -; GISEL: ; %bb.0: -; GISEL-NEXT: fcmp d0, d1 -; GISEL-NEXT: fccmp d2, d3, #4, pl -; GISEL-NEXT: fccmp d2, d3, #1, ne -; GISEL-NEXT: fccmp d4, d5, #0, vc -; GISEL-NEXT: csel w0, w0, w1, gt -; GISEL-NEXT: ret %c0 = fcmp olt double %v0, %v1 %c1 = fcmp ueq double %v2, %v3 %c2 = fcmp ogt double %v4, %v5 @@ -1090,16 +906,16 @@ define i32 @select_or_olt_ueq_ogt(double %v0, double %v1, double %v2, double %v3 ; Verify that we correctly promote f16. define i32 @half_select_and_olt_oge(half %v0, half %v1, half %v2, half %v3, i32 %a, i32 %b) #0 { -; CHECK-LABEL: half_select_and_olt_oge: -; CHECK: ; %bb.0: -; CHECK-NEXT: fcvt s1, h1 -; CHECK-NEXT: fcvt s0, h0 -; CHECK-NEXT: fcmp s0, s1 -; CHECK-NEXT: fcvt s0, h3 -; CHECK-NEXT: fcvt s1, h2 -; CHECK-NEXT: fccmp s1, s0, #8, mi -; CHECK-NEXT: csel w0, w0, w1, ge -; CHECK-NEXT: ret +; SDISEL-LABEL: half_select_and_olt_oge: +; SDISEL: ; %bb.0: +; SDISEL-NEXT: fcvt s1, h1 +; SDISEL-NEXT: fcvt s0, h0 +; SDISEL-NEXT: fcmp s0, s1 +; SDISEL-NEXT: fcvt s0, h3 +; SDISEL-NEXT: fcvt s1, h2 +; SDISEL-NEXT: fccmp s1, s0, #8, mi +; SDISEL-NEXT: csel w0, w0, w1, ge +; SDISEL-NEXT: ret ; ; GISEL-LABEL: half_select_and_olt_oge: ; GISEL: ; %bb.0: @@ -1119,17 +935,17 @@ define i32 @half_select_and_olt_oge(half %v0, half %v1, half %v2, half %v3, i32 } define i32 @half_select_and_olt_one(half %v0, half %v1, half %v2, half %v3, i32 %a, i32 %b) #0 { -; CHECK-LABEL: half_select_and_olt_one: -; CHECK: ; %bb.0: -; CHECK-NEXT: fcvt s1, h1 -; CHECK-NEXT: fcvt s0, h0 -; CHECK-NEXT: fcmp s0, s1 -; CHECK-NEXT: fcvt s0, h3 -; CHECK-NEXT: fcvt s1, h2 -; CHECK-NEXT: fccmp s1, s0, #4, mi -; CHECK-NEXT: fccmp s1, s0, #1, ne -; CHECK-NEXT: csel w0, w0, w1, vc -; CHECK-NEXT: ret +; SDISEL-LABEL: half_select_and_olt_one: +; SDISEL: ; %bb.0: +; SDISEL-NEXT: fcvt s1, h1 +; SDISEL-NEXT: fcvt s0, h0 +; SDISEL-NEXT: fcmp s0, s1 +; SDISEL-NEXT: fcvt s0, h3 +; SDISEL-NEXT: fcvt s1, h2 +; SDISEL-NEXT: fccmp s1, s0, #4, mi +; SDISEL-NEXT: fccmp s1, s0, #1, ne +; SDISEL-NEXT: csel w0, w0, w1, vc +; SDISEL-NEXT: ret ; ; GISEL-LABEL: half_select_and_olt_one: ; GISEL: ; %bb.0: @@ -1175,30 +991,6 @@ define i32 @f128_select_and_olt_oge(fp128 %v0, fp128 %v1, fp128 %v2, fp128 %v3, ; CHECK-NEXT: ldp x22, x21, [sp, #32] ; 16-byte Folded Reload ; CHECK-NEXT: add sp, sp, #80 ; CHECK-NEXT: ret -; -; GISEL-LABEL: f128_select_and_olt_oge: -; GISEL: ; %bb.0: -; GISEL-NEXT: sub sp, sp, #80 -; GISEL-NEXT: stp x22, x21, [sp, #32] ; 16-byte Folded Spill -; GISEL-NEXT: stp x20, x19, [sp, #48] ; 16-byte Folded Spill -; GISEL-NEXT: stp x29, x30, [sp, #64] ; 16-byte Folded Spill -; GISEL-NEXT: mov x19, x1 -; GISEL-NEXT: mov x20, x0 -; GISEL-NEXT: stp q2, q3, [sp] ; 32-byte Folded Spill -; GISEL-NEXT: bl ___lttf2 -; GISEL-NEXT: cmp w0, #0 -; GISEL-NEXT: cset w21, lt -; GISEL-NEXT: ldp q0, q1, [sp] ; 32-byte Folded Reload -; GISEL-NEXT: bl ___getf2 -; GISEL-NEXT: cmp w0, #0 -; GISEL-NEXT: cset w8, ge -; GISEL-NEXT: tst w8, w21 -; GISEL-NEXT: csel w0, w20, w19, ne -; GISEL-NEXT: ldp x29, x30, [sp, #64] ; 16-byte Folded Reload -; GISEL-NEXT: ldp x20, x19, [sp, #48] ; 16-byte Folded Reload -; GISEL-NEXT: ldp x22, x21, [sp, #32] ; 16-byte Folded Reload -; GISEL-NEXT: add sp, sp, #80 -; GISEL-NEXT: ret %c0 = fcmp olt fp128 %v0, %v1 %c1 = fcmp oge fp128 %v2, %v3 %cr = and i1 %c1, %c0 @@ -1209,14 +1001,14 @@ define i32 @f128_select_and_olt_oge(fp128 %v0, fp128 %v1, fp128 %v2, fp128 %v3, ; This testcase resembles the core problem of http://llvm.org/PR39550 ; (an OR operation is 2 levels deep but needs to be implemented first) define i32 @deep_or(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %x, i32 %y) { -; CHECK-LABEL: deep_or: -; CHECK: ; %bb.0: -; CHECK-NEXT: cmp w2, #20 -; CHECK-NEXT: ccmp w2, #15, #4, ne -; CHECK-NEXT: ccmp w1, #0, #4, eq -; CHECK-NEXT: ccmp w0, #0, #4, ne -; CHECK-NEXT: csel w0, w4, w5, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: deep_or: +; SDISEL: ; %bb.0: +; SDISEL-NEXT: cmp w2, #20 +; SDISEL-NEXT: ccmp w2, #15, #4, ne +; SDISEL-NEXT: ccmp w1, #0, #4, eq +; SDISEL-NEXT: ccmp w0, #0, #4, ne +; SDISEL-NEXT: csel w0, w4, w5, ne +; SDISEL-NEXT: ret ; ; GISEL-LABEL: deep_or: ; GISEL: ; %bb.0: @@ -1241,14 +1033,14 @@ define i32 @deep_or(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %x, i32 %y) { ; Variation of deep_or, we still need to implement the OR first though. define i32 @deep_or1(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %x, i32 %y) { -; CHECK-LABEL: deep_or1: -; CHECK: ; %bb.0: -; CHECK-NEXT: cmp w2, #20 -; CHECK-NEXT: ccmp w2, #15, #4, ne -; CHECK-NEXT: ccmp w0, #0, #4, eq -; CHECK-NEXT: ccmp w1, #0, #4, ne -; CHECK-NEXT: csel w0, w4, w5, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: deep_or1: +; SDISEL: ; %bb.0: +; SDISEL-NEXT: cmp w2, #20 +; SDISEL-NEXT: ccmp w2, #15, #4, ne +; SDISEL-NEXT: ccmp w0, #0, #4, eq +; SDISEL-NEXT: ccmp w1, #0, #4, ne +; SDISEL-NEXT: csel w0, w4, w5, ne +; SDISEL-NEXT: ret ; ; GISEL-LABEL: deep_or1: ; GISEL: ; %bb.0: @@ -1273,14 +1065,14 @@ define i32 @deep_or1(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %x, i32 %y) { ; Variation of deep_or, we still need to implement the OR first though. define i32 @deep_or2(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %x, i32 %y) { -; CHECK-LABEL: deep_or2: -; CHECK: ; %bb.0: -; CHECK-NEXT: cmp w2, #20 -; CHECK-NEXT: ccmp w2, #15, #4, ne -; CHECK-NEXT: ccmp w1, #0, #4, eq -; CHECK-NEXT: ccmp w0, #0, #4, ne -; CHECK-NEXT: csel w0, w4, w5, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: deep_or2: +; SDISEL: ; %bb.0: +; SDISEL-NEXT: cmp w2, #20 +; SDISEL-NEXT: ccmp w2, #15, #4, ne +; SDISEL-NEXT: ccmp w1, #0, #4, eq +; SDISEL-NEXT: ccmp w0, #0, #4, ne +; SDISEL-NEXT: csel w0, w4, w5, ne +; SDISEL-NEXT: ret ; ; GISEL-LABEL: deep_or2: ; GISEL: ; %bb.0: @@ -1306,26 +1098,26 @@ define i32 @deep_or2(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %x, i32 %y) { ; This test is trying to test that multiple ccmp's don't get created in a way ; that they would have multiple uses. It doesn't seem to. define i32 @multiccmp(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %x, i32 %y) #0 { -; CHECK-LABEL: multiccmp: -; CHECK: ; %bb.0: ; %entry -; CHECK-NEXT: stp x22, x21, [sp, #-48]! ; 16-byte Folded Spill -; CHECK-NEXT: stp x20, x19, [sp, #16] ; 16-byte Folded Spill -; CHECK-NEXT: stp x29, x30, [sp, #32] ; 16-byte Folded Spill -; CHECK-NEXT: mov x19, x5 -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: cset w20, gt -; CHECK-NEXT: cmp w2, w3 -; CHECK-NEXT: cset w21, ne -; CHECK-NEXT: tst w20, w21 -; CHECK-NEXT: csel w0, w5, w4, ne -; CHECK-NEXT: bl _callee -; CHECK-NEXT: tst w20, w21 -; CHECK-NEXT: csel w0, w0, w19, ne -; CHECK-NEXT: bl _callee -; CHECK-NEXT: ldp x29, x30, [sp, #32] ; 16-byte Folded Reload -; CHECK-NEXT: ldp x20, x19, [sp, #16] ; 16-byte Folded Reload -; CHECK-NEXT: ldp x22, x21, [sp], #48 ; 16-byte Folded Reload -; CHECK-NEXT: ret +; SDISEL-LABEL: multiccmp: +; SDISEL: ; %bb.0: ; %entry +; SDISEL-NEXT: stp x22, x21, [sp, #-48]! ; 16-byte Folded Spill +; SDISEL-NEXT: stp x20, x19, [sp, #16] ; 16-byte Folded Spill +; SDISEL-NEXT: stp x29, x30, [sp, #32] ; 16-byte Folded Spill +; SDISEL-NEXT: mov x19, x5 +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: cset w20, gt +; SDISEL-NEXT: cmp w2, w3 +; SDISEL-NEXT: cset w21, ne +; SDISEL-NEXT: tst w20, w21 +; SDISEL-NEXT: csel w0, w5, w4, ne +; SDISEL-NEXT: bl _callee +; SDISEL-NEXT: tst w20, w21 +; SDISEL-NEXT: csel w0, w0, w19, ne +; SDISEL-NEXT: bl _callee +; SDISEL-NEXT: ldp x29, x30, [sp, #32] ; 16-byte Folded Reload +; SDISEL-NEXT: ldp x20, x19, [sp, #16] ; 16-byte Folded Reload +; SDISEL-NEXT: ldp x22, x21, [sp], #48 ; 16-byte Folded Reload +; SDISEL-NEXT: ret ; ; GISEL-LABEL: multiccmp: ; GISEL: ; %bb.0: ; %entry @@ -1358,30 +1150,30 @@ entry: } define i32 @multiccmp2(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %x, i32 %y) #0 { -; CHECK-LABEL: multiccmp2: -; CHECK: ; %bb.0: ; %entry -; CHECK-NEXT: stp x22, x21, [sp, #-48]! ; 16-byte Folded Spill -; CHECK-NEXT: stp x20, x19, [sp, #16] ; 16-byte Folded Spill -; CHECK-NEXT: stp x29, x30, [sp, #32] ; 16-byte Folded Spill -; CHECK-NEXT: mov x19, x5 -; CHECK-NEXT: mov x20, x3 -; CHECK-NEXT: mov x21, x0 -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: cset w8, gt -; CHECK-NEXT: cmp w2, w3 -; CHECK-NEXT: cset w22, ne -; CHECK-NEXT: tst w8, w22 -; CHECK-NEXT: csel w0, w5, w4, ne -; CHECK-NEXT: bl _callee -; CHECK-NEXT: cmp w21, w20 -; CHECK-NEXT: cset w8, eq -; CHECK-NEXT: tst w22, w8 -; CHECK-NEXT: csel w0, w0, w19, ne -; CHECK-NEXT: bl _callee -; CHECK-NEXT: ldp x29, x30, [sp, #32] ; 16-byte Folded Reload -; CHECK-NEXT: ldp x20, x19, [sp, #16] ; 16-byte Folded Reload -; CHECK-NEXT: ldp x22, x21, [sp], #48 ; 16-byte Folded Reload -; CHECK-NEXT: ret +; SDISEL-LABEL: multiccmp2: +; SDISEL: ; %bb.0: ; %entry +; SDISEL-NEXT: stp x22, x21, [sp, #-48]! ; 16-byte Folded Spill +; SDISEL-NEXT: stp x20, x19, [sp, #16] ; 16-byte Folded Spill +; SDISEL-NEXT: stp x29, x30, [sp, #32] ; 16-byte Folded Spill +; SDISEL-NEXT: mov x19, x5 +; SDISEL-NEXT: mov x20, x3 +; SDISEL-NEXT: mov x21, x0 +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: cset w8, gt +; SDISEL-NEXT: cmp w2, w3 +; SDISEL-NEXT: cset w22, ne +; SDISEL-NEXT: tst w8, w22 +; SDISEL-NEXT: csel w0, w5, w4, ne +; SDISEL-NEXT: bl _callee +; SDISEL-NEXT: cmp w21, w20 +; SDISEL-NEXT: cset w8, eq +; SDISEL-NEXT: tst w22, w8 +; SDISEL-NEXT: csel w0, w0, w19, ne +; SDISEL-NEXT: bl _callee +; SDISEL-NEXT: ldp x29, x30, [sp, #32] ; 16-byte Folded Reload +; SDISEL-NEXT: ldp x20, x19, [sp, #16] ; 16-byte Folded Reload +; SDISEL-NEXT: ldp x22, x21, [sp], #48 ; 16-byte Folded Reload +; SDISEL-NEXT: ret ; ; GISEL-LABEL: multiccmp2: ; GISEL: ; %bb.0: ; %entry diff --git a/llvm/test/CodeGen/AArch64/cmp-chains.ll b/llvm/test/CodeGen/AArch64/cmp-chains.ll index a86ff04..e31ddc3 100644 --- a/llvm/test/CodeGen/AArch64/cmp-chains.ll +++ b/llvm/test/CodeGen/AArch64/cmp-chains.ll @@ -1,16 +1,26 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s +; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s --check-prefixes=CHECK,SDISEL +; RUN: llc < %s -mtriple=aarch64-- -global-isel | FileCheck %s --check-prefixes=CHECK,GISEL ; Ensure chains of comparisons produce chains of `ccmp` ; (x0 < x1) && (x2 > x3) define i32 @cmp_and2(i32 %0, i32 %1, i32 %2, i32 %3) { -; CHECK-LABEL: cmp_and2: -; CHECK: // %bb.0: -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, lo -; CHECK-NEXT: cset w0, hi -; CHECK-NEXT: ret +; SDISEL-LABEL: cmp_and2: +; SDISEL: // %bb.0: +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, lo +; SDISEL-NEXT: cset w0, hi +; SDISEL-NEXT: ret +; +; GISEL-LABEL: cmp_and2: +; GISEL: // %bb.0: +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lo +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hi +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret %5 = icmp ult i32 %0, %1 %6 = icmp ugt i32 %2, %3 %7 = select i1 %5, i1 %6, i1 false @@ -20,13 +30,25 @@ define i32 @cmp_and2(i32 %0, i32 %1, i32 %2, i32 %3) { ; (x0 < x1) && (x2 > x3) && (x4 != x5) define i32 @cmp_and3(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) { -; CHECK-LABEL: cmp_and3: -; CHECK: // %bb.0: -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, lo -; CHECK-NEXT: ccmp w4, w5, #4, hi -; CHECK-NEXT: cset w0, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: cmp_and3: +; SDISEL: // %bb.0: +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, lo +; SDISEL-NEXT: ccmp w4, w5, #4, hi +; SDISEL-NEXT: cset w0, ne +; SDISEL-NEXT: ret +; +; GISEL-LABEL: cmp_and3: +; GISEL: // %bb.0: +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lo +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hi +; GISEL-NEXT: cmp w4, w5 +; GISEL-NEXT: and w8, w8, w9 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret %7 = icmp ult i32 %0, %1 %8 = icmp ugt i32 %2, %3 %9 = select i1 %7, i1 %8, i1 false @@ -38,14 +60,29 @@ define i32 @cmp_and3(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) { ; (x0 < x1) && (x2 > x3) && (x4 != x5) && (x6 == x7) define i32 @cmp_and4(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) { -; CHECK-LABEL: cmp_and4: -; CHECK: // %bb.0: -; CHECK-NEXT: cmp w2, w3 -; CHECK-NEXT: ccmp w0, w1, #2, hi -; CHECK-NEXT: ccmp w4, w5, #4, lo -; CHECK-NEXT: ccmp w6, w7, #0, ne -; CHECK-NEXT: cset w0, eq -; CHECK-NEXT: ret +; SDISEL-LABEL: cmp_and4: +; SDISEL: // %bb.0: +; SDISEL-NEXT: cmp w2, w3 +; SDISEL-NEXT: ccmp w0, w1, #2, hi +; SDISEL-NEXT: ccmp w4, w5, #4, lo +; SDISEL-NEXT: ccmp w6, w7, #0, ne +; SDISEL-NEXT: cset w0, eq +; SDISEL-NEXT: ret +; +; GISEL-LABEL: cmp_and4: +; GISEL: // %bb.0: +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w8, hi +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w9, lo +; GISEL-NEXT: cmp w4, w5 +; GISEL-NEXT: and w8, w8, w9 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: cmp w6, w7 +; GISEL-NEXT: and w8, w8, w9 +; GISEL-NEXT: cset w9, eq +; GISEL-NEXT: and w0, w8, w9 +; GISEL-NEXT: ret %9 = icmp ugt i32 %2, %3 %10 = icmp ult i32 %0, %1 %11 = select i1 %9, i1 %10, i1 false @@ -59,12 +96,21 @@ define i32 @cmp_and4(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 ; (x0 < x1) || (x2 > x3) define i32 @cmp_or2(i32 %0, i32 %1, i32 %2, i32 %3) { -; CHECK-LABEL: cmp_or2: -; CHECK: // %bb.0: -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #0, hs -; CHECK-NEXT: cset w0, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: cmp_or2: +; SDISEL: // %bb.0: +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #0, hs +; SDISEL-NEXT: cset w0, ne +; SDISEL-NEXT: ret +; +; GISEL-LABEL: cmp_or2: +; GISEL: // %bb.0: +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lo +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: orr w0, w8, w9 +; GISEL-NEXT: ret %5 = icmp ult i32 %0, %1 %6 = icmp ne i32 %2, %3 %7 = select i1 %5, i1 true, i1 %6 @@ -74,13 +120,25 @@ define i32 @cmp_or2(i32 %0, i32 %1, i32 %2, i32 %3) { ; (x0 < x1) || (x2 > x3) || (x4 != x5) define i32 @cmp_or3(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) { -; CHECK-LABEL: cmp_or3: -; CHECK: // %bb.0: -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, hs -; CHECK-NEXT: ccmp w4, w5, #0, ls -; CHECK-NEXT: cset w0, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: cmp_or3: +; SDISEL: // %bb.0: +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, hs +; SDISEL-NEXT: ccmp w4, w5, #0, ls +; SDISEL-NEXT: cset w0, ne +; SDISEL-NEXT: ret +; +; GISEL-LABEL: cmp_or3: +; GISEL: // %bb.0: +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lo +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hi +; GISEL-NEXT: cmp w4, w5 +; GISEL-NEXT: orr w8, w8, w9 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: orr w0, w8, w9 +; GISEL-NEXT: ret %7 = icmp ult i32 %0, %1 %8 = icmp ugt i32 %2, %3 %9 = select i1 %7, i1 true, i1 %8 @@ -92,14 +150,29 @@ define i32 @cmp_or3(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) { ; (x0 < x1) || (x2 > x3) || (x4 != x5) || (x6 == x7) define i32 @cmp_or4(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) { -; CHECK-LABEL: cmp_or4: -; CHECK: // %bb.0: -; CHECK-NEXT: cmp w0, w1 -; CHECK-NEXT: ccmp w2, w3, #2, hs -; CHECK-NEXT: ccmp w4, w5, #0, ls -; CHECK-NEXT: ccmp w6, w7, #4, eq -; CHECK-NEXT: cset w0, eq -; CHECK-NEXT: ret +; SDISEL-LABEL: cmp_or4: +; SDISEL: // %bb.0: +; SDISEL-NEXT: cmp w0, w1 +; SDISEL-NEXT: ccmp w2, w3, #2, hs +; SDISEL-NEXT: ccmp w4, w5, #0, ls +; SDISEL-NEXT: ccmp w6, w7, #4, eq +; SDISEL-NEXT: cset w0, eq +; SDISEL-NEXT: ret +; +; GISEL-LABEL: cmp_or4: +; GISEL: // %bb.0: +; GISEL-NEXT: cmp w0, w1 +; GISEL-NEXT: cset w8, lo +; GISEL-NEXT: cmp w2, w3 +; GISEL-NEXT: cset w9, hi +; GISEL-NEXT: cmp w4, w5 +; GISEL-NEXT: orr w8, w8, w9 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: cmp w6, w7 +; GISEL-NEXT: orr w8, w8, w9 +; GISEL-NEXT: cset w9, eq +; GISEL-NEXT: orr w0, w8, w9 +; GISEL-NEXT: ret %9 = icmp ult i32 %0, %1 %10 = icmp ugt i32 %2, %3 %11 = select i1 %9, i1 true, i1 %10 @@ -113,12 +186,21 @@ define i32 @cmp_or4(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 ; (x0 != 0) || (x1 != 0) define i32 @true_or2(i32 %0, i32 %1) { -; CHECK-LABEL: true_or2: -; CHECK: // %bb.0: -; CHECK-NEXT: orr w8, w0, w1 -; CHECK-NEXT: cmp w8, #0 -; CHECK-NEXT: cset w0, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: true_or2: +; SDISEL: // %bb.0: +; SDISEL-NEXT: orr w8, w0, w1 +; SDISEL-NEXT: cmp w8, #0 +; SDISEL-NEXT: cset w0, ne +; SDISEL-NEXT: ret +; +; GISEL-LABEL: true_or2: +; GISEL: // %bb.0: +; GISEL-NEXT: cmp w0, #0 +; GISEL-NEXT: cset w8, ne +; GISEL-NEXT: cmp w1, #0 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: orr w0, w8, w9 +; GISEL-NEXT: ret %3 = icmp ne i32 %0, 0 %4 = icmp ne i32 %1, 0 %5 = select i1 %3, i1 true, i1 %4 @@ -128,13 +210,25 @@ define i32 @true_or2(i32 %0, i32 %1) { ; (x0 != 0) || (x1 != 0) || (x2 != 0) define i32 @true_or3(i32 %0, i32 %1, i32 %2) { -; CHECK-LABEL: true_or3: -; CHECK: // %bb.0: -; CHECK-NEXT: orr w8, w0, w1 -; CHECK-NEXT: orr w8, w8, w2 -; CHECK-NEXT: cmp w8, #0 -; CHECK-NEXT: cset w0, ne -; CHECK-NEXT: ret +; SDISEL-LABEL: true_or3: +; SDISEL: // %bb.0: +; SDISEL-NEXT: orr w8, w0, w1 +; SDISEL-NEXT: orr w8, w8, w2 +; SDISEL-NEXT: cmp w8, #0 +; SDISEL-NEXT: cset w0, ne +; SDISEL-NEXT: ret +; +; GISEL-LABEL: true_or3: +; GISEL: // %bb.0: +; GISEL-NEXT: cmp w0, #0 +; GISEL-NEXT: cset w8, ne +; GISEL-NEXT: cmp w1, #0 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: cmp w2, #0 +; GISEL-NEXT: orr w8, w8, w9 +; GISEL-NEXT: cset w9, ne +; GISEL-NEXT: orr w0, w8, w9 +; GISEL-NEXT: ret %4 = icmp ne i32 %0, 0 %5 = icmp ne i32 %1, 0 %6 = select i1 %4, i1 true, i1 %5 @@ -143,3 +237,5 @@ define i32 @true_or3(i32 %0, i32 %1, i32 %2) { %9 = zext i1 %8 to i32 ret i32 %9 } +;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +; CHECK: {{.*}} diff --git a/llvm/test/CodeGen/AArch64/dag-combine-select.ll b/llvm/test/CodeGen/AArch64/dag-combine-select.ll index a69e961..6b08479 100644 --- a/llvm/test/CodeGen/AArch64/dag-combine-select.ll +++ b/llvm/test/CodeGen/AArch64/dag-combine-select.ll @@ -1,17 +1,26 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -mtriple arm64-none-eabi -o - %s | FileCheck %s +; RUN: llc -mtriple arm64-none-eabi -o - %s | FileCheck %s --check-prefixes=CHECK,SDISEL +; RUN: llc -mtriple arm64-none-eabi -global-isel -o - %s | FileCheck %s --check-prefixes=CHECK,GISEL @out = internal global i32 0, align 4 ; Ensure that we transform select(C0, x, select(C1, x, y)) towards ; select(C0 | C1, x, y) so we can use CMP;CCMP for the implementation. define i32 @test0(i32 %v0, i32 %v1, i32 %v2) { -; CHECK-LABEL: test0: -; CHECK: // %bb.0: -; CHECK-NEXT: cmp w0, #7 -; CHECK-NEXT: ccmp w1, #0, #0, ne -; CHECK-NEXT: csel w0, w1, w2, gt -; CHECK-NEXT: ret +; SDISEL-LABEL: test0: +; SDISEL: // %bb.0: +; SDISEL-NEXT: cmp w0, #7 +; SDISEL-NEXT: ccmp w1, #0, #0, ne +; SDISEL-NEXT: csel w0, w1, w2, gt +; SDISEL-NEXT: ret +; +; GISEL-LABEL: test0: +; GISEL: // %bb.0: +; GISEL-NEXT: cmp w0, #7 +; GISEL-NEXT: csel w8, w1, w2, eq +; GISEL-NEXT: cmp w1, #0 +; GISEL-NEXT: csel w0, w1, w8, gt +; GISEL-NEXT: ret %cmp1 = icmp eq i32 %v0, 7 %cmp2 = icmp sgt i32 %v1, 0 %sel0 = select i1 %cmp1, i32 %v1, i32 %v2 @@ -23,18 +32,36 @@ define i32 @test0(i32 %v0, i32 %v1, i32 %v2) { ; sequences. This case should be transformed to select(C0, select(C1, x, y), y) ; anyway to get CSE effects. define void @test1(i32 %bitset, i32 %val0, i32 %val1) { -; CHECK-LABEL: test1: -; CHECK: // %bb.0: -; CHECK-NEXT: cmp w0, #7 -; CHECK-NEXT: adrp x8, out -; CHECK-NEXT: csel w9, w1, w2, eq -; CHECK-NEXT: cmp w9, #13 -; CHECK-NEXT: csel w9, w1, w2, lo -; CHECK-NEXT: cmp w0, #42 -; CHECK-NEXT: csel w10, w1, w9, eq -; CHECK-NEXT: str w9, [x8, :lo12:out] -; CHECK-NEXT: str w10, [x8, :lo12:out] -; CHECK-NEXT: ret +; SDISEL-LABEL: test1: +; SDISEL: // %bb.0: +; SDISEL-NEXT: cmp w0, #7 +; SDISEL-NEXT: adrp x8, out +; SDISEL-NEXT: csel w9, w1, w2, eq +; SDISEL-NEXT: cmp w9, #13 +; SDISEL-NEXT: csel w9, w1, w2, lo +; SDISEL-NEXT: cmp w0, #42 +; SDISEL-NEXT: csel w10, w1, w9, eq +; SDISEL-NEXT: str w9, [x8, :lo12:out] +; SDISEL-NEXT: str w10, [x8, :lo12:out] +; SDISEL-NEXT: ret +; +; GISEL-LABEL: test1: +; GISEL: // %bb.0: +; GISEL-NEXT: cmp w0, #7 +; GISEL-NEXT: csel w8, w1, w2, eq +; GISEL-NEXT: cmp w8, #13 +; GISEL-NEXT: cset w8, lo +; GISEL-NEXT: tst w8, #0x1 +; GISEL-NEXT: csel w9, w1, w2, ne +; GISEL-NEXT: cmp w0, #42 +; GISEL-NEXT: cset w10, eq +; GISEL-NEXT: orr w8, w10, w8 +; GISEL-NEXT: tst w8, #0x1 +; GISEL-NEXT: adrp x8, out +; GISEL-NEXT: csel w10, w1, w2, ne +; GISEL-NEXT: str w9, [x8, :lo12:out] +; GISEL-NEXT: str w10, [x8, :lo12:out] +; GISEL-NEXT: ret %cmp1 = icmp eq i32 %bitset, 7 %cond = select i1 %cmp1, i32 %val0, i32 %val1 %cmp5 = icmp ult i32 %cond, 13 @@ -46,3 +73,5 @@ define void @test1(i32 %bitset, i32 %val0, i32 %val1) { store volatile i32 %cond17, i32* @out, align 4 ret void } +;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +; CHECK: {{.*}}