From: Maxime Ripard <maxime.ripard@free-electrons.com>
Date: Mon, 12 Oct 2015 20:21:49 +0000 (+0200)
Subject: ARM: sun5i: Add audio PLL
X-Git-Tag: v4.14-rc1~4346^2~4^2~16
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6f87abb8cd7dc00701f0a732962420fddbf4b79b;p=platform%2Fkernel%2Flinux-rpi.git

ARM: sun5i: Add audio PLL

The A13 uses the PLL2 as the audio PLL, which is the parent of all the
other audio clocks in the system (i2s, codec, etc.). However, it has a
different divider configuration than the A10, hence the difference
compatible.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
---

diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 9ffee9b..9b03eb9 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -102,6 +102,15 @@
 			clock-output-names = "pll1";
 		};
 
+		pll2: clk@01c20008 {
+			#clock-cells = <1>;
+			compatible = "allwinner,sun5i-a13-pll2-clk";
+			reg = <0x01c20008 0x8>;
+			clocks = <&osc24M>;
+			clock-output-names = "pll2-1x", "pll2-2x",
+					     "pll2-4x", "pll2-8x";
+		};
+
 		pll4: clk@01c20018 {
 			#clock-cells = <0>;
 			compatible = "allwinner,sun4i-a10-pll1-clk";