From: Alex Deucher Date: Mon, 13 Jan 2014 15:18:03 +0000 (-0500) Subject: drm/radeon/cik: use hw defaults for TC_CFG registers X-Git-Tag: upstream/snapshot3+hdmi~3525^2~15^2~14 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6dfa09d7c9dd73fbcd9c7edbb4fa947637d4ed6e;p=platform%2Fadaptation%2Frenesas_rcar%2Frenesas_kernel.git drm/radeon/cik: use hw defaults for TC_CFG registers Use the hw power up values rather than 0. Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index e8ec15d..6ffe824 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c @@ -5353,20 +5353,6 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev) WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT | WRITE_PROTECTION_FAULT_ENABLE_DEFAULT); - /* TC cache setup ??? */ - WREG32(TC_CFG_L1_LOAD_POLICY0, 0); - WREG32(TC_CFG_L1_LOAD_POLICY1, 0); - WREG32(TC_CFG_L1_STORE_POLICY, 0); - - WREG32(TC_CFG_L2_LOAD_POLICY0, 0); - WREG32(TC_CFG_L2_LOAD_POLICY1, 0); - WREG32(TC_CFG_L2_STORE_POLICY0, 0); - WREG32(TC_CFG_L2_STORE_POLICY1, 0); - WREG32(TC_CFG_L2_ATOMIC_POLICY, 0); - - WREG32(TC_CFG_L1_VOLATILE, 0); - WREG32(TC_CFG_L2_VOLATILE, 0); - if (rdev->family == CHIP_KAVERI) { u32 tmp = RREG32(CHUB_CONTROL); tmp &= ~BYPASS_VM;